]> git.sur5r.net Git - u-boot/blobdiff - drivers/video/rockchip/rk_hdmi.c
Revert "x86: broadwell: gpio: Remove the codes to set up pin control"
[u-boot] / drivers / video / rockchip / rk_hdmi.c
index 5fcb61ac2a3eddd6affc40c1db07bed6f49d467a..7976c5e26376985633dca22ece6f7f47df5ae47b 100644 (file)
@@ -666,7 +666,7 @@ static int hdmi_wait_for_hpd(struct rk3288_hdmi *regs)
                if (hdmi_get_plug_in_status(regs))
                        return 0;
                udelay(100);
-       } while (get_timer(start) < 30000);
+       } while (get_timer(start) < 300);
 
        return -1;
 }
@@ -859,15 +859,15 @@ static int rk_hdmi_probe(struct udevice *dev)
 {
        struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
        struct rk_hdmi_priv *priv = dev_get_priv(dev);
-       struct udevice *reg, *clk;
-       int periph;
+       struct udevice *reg;
+       struct clk clk;
        int ret;
        int vop_id = uc_plat->source_id;
 
        ret = clk_get_by_index(dev, 0, &clk);
        if (ret >= 0) {
-               periph = ret;
-               ret = clk_set_periph_rate(clk, periph, 0);
+               ret = clk_set_rate(&clk, 0);
+               clk_free(&clk);
        }
        if (ret) {
                debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret);
@@ -880,8 +880,8 @@ static int rk_hdmi_probe(struct udevice *dev)
         */
        ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
        if (ret >= 0) {
-               periph = ret;
-               ret = clk_set_periph_rate(clk, periph, 384000000);
+               ret = clk_set_rate(&clk, 384000000);
+               clk_free(&clk);
        }
        if (ret < 0) {
                debug("%s: Failed to set clock in source device '%s': ret=%d\n",