]> git.sur5r.net Git - u-boot/blobdiff - drivers/video/sunxi_display.c
libfdt: Bring in upstream stringlist functions
[u-boot] / drivers / video / sunxi_display.c
index 06ed5c760318a765d0f30489569601f0f2a62269..6cba1b95a110528dbda9d29d9370a7613f60d6d6 100644 (file)
 #include <asm/arch/clock.h>
 #include <asm/arch/display.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/pwm.h>
 #include <asm/global_data.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <axp_pmic.h>
 #include <errno.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
@@ -22,6 +24,7 @@
 #include <malloc.h>
 #include <video_fb.h>
 #include "videomodes.h"
+#include "anx9804.h"
 #include "hitachi_tx18d42vm_lcd.h"
 #include "ssd2828.h"
 
@@ -741,6 +744,16 @@ static void sunxi_lcdc_backlight_enable(void)
                gpio_direction_output(pin, 1);
 
        pin = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_BL_PWM);
+#ifdef SUNXI_PWM_PIN0
+       if (pin == SUNXI_PWM_PIN0) {
+               writel(SUNXI_PWM_CTRL_POLARITY0(PWM_ON) |
+                      SUNXI_PWM_CTRL_ENABLE0 |
+                      SUNXI_PWM_CTRL_PRESCALE0(0xf), SUNXI_PWM_CTRL_REG);
+               writel(SUNXI_PWM_PERIOD_80PCT, SUNXI_PWM_CH0_PERIOD);
+               sunxi_gpio_set_cfgpin(pin, SUNXI_PWM_MUX);
+               return;
+       }
+#endif
        if (pin >= 0)
                gpio_direction_output(pin, PWM_ON);
 }
@@ -765,13 +778,21 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
                (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
        int bp, clk_delay, clk_div, clk_double, pin, total, val;
 
-       for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(27); pin++)
+#if defined CONFIG_MACH_SUN8I && defined CONFIG_VIDEO_LCD_IF_LVDS
+       for (pin = SUNXI_GPD(18); pin <= SUNXI_GPD(27); pin++) {
+#else
+       for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(27); pin++) {
+#endif
 #ifdef CONFIG_VIDEO_LCD_IF_PARALLEL
                sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LCD0);
 #endif
 #ifdef CONFIG_VIDEO_LCD_IF_LVDS
                sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LVDS0);
 #endif
+#ifdef CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
+               sunxi_gpio_set_drv(pin, 3);
+#endif
+       }
 
        sunxi_lcdc_pll_set(0, mode->pixclock_khz, &clk_div, &clk_double);
 
@@ -1208,6 +1229,17 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode,
                break;
        case sunxi_monitor_lcd:
                sunxi_lcdc_panel_enable();
+               if (IS_ENABLED(CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804)) {
+                       /*
+                        * The anx9804 needs 1.8V from eldo3, we do this here
+                        * and not via CONFIG_AXP_ELDO3_VOLT from board_init()
+                        * to avoid turning this on when using hdmi output.
+                        */
+                       axp_set_eldo(3, 1800);
+                       anx9804_init(CONFIG_VIDEO_LCD_I2C_BUS, 4,
+                                    ANX9804_DATA_RATE_1620M,
+                                    sunxi_display.depth);
+               }
                if (IS_ENABLED(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM)) {
                        mdelay(50); /* Wait for lcd controller power on */
                        hitachi_tx18d42vm_init();
@@ -1530,7 +1562,7 @@ int sunxi_simplefb_setup(void *blob)
        offset = fdt_node_offset_by_compatible(blob, -1,
                                               "allwinner,simple-framebuffer");
        while (offset >= 0) {
-               ret = fdt_find_string(blob, offset, "allwinner,pipeline",
+               ret = fdt_stringlist_search(blob, offset, "allwinner,pipeline",
                                      pipeline);
                if (ret == 0)
                        break;