+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2011 The Chromium OS Authors.
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
-enum lcd_cache_t {
- FDT_LCD_CACHE_OFF = 0,
- FDT_LCD_CACHE_WRITE_THROUGH = 1 << 0,
- FDT_LCD_CACHE_WRITE_BACK = 1 << 1,
- FDT_LCD_CACHE_FLUSH = 1 << 2,
- FDT_LCD_CACHE_WRITE_BACK_FLUSH = FDT_LCD_CACHE_WRITE_BACK |
- FDT_LCD_CACHE_FLUSH,
-};
-
/* Information about the display controller */
struct tegra_lcd_priv {
int width; /* width in pixels */
struct disp_ctlr *disp; /* Display controller to use */
fdt_addr_t frame_buffer; /* Address of frame buffer */
unsigned pixel_clock; /* Pixel clock in Hz */
- enum lcd_cache_t cache_type;
};
enum {
/**
* Register a new display based on device tree configuration.
*
- * The frame buffer can be positioned by U-Boot or overriden by the fdt.
+ * The frame buffer can be positioned by U-Boot or overridden by the fdt.
* You should pass in the U-Boot address here, and check the contents of
* struct tegra_lcd_priv to see what was actually chosen.
*
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct tegra_lcd_priv *priv = dev_get_priv(dev);
const void *blob = gd->fdt_blob;
- int type = DCACHE_OFF;
int ret;
/* Initialize the Tegra display controller */
return ret;
}
- /* Set up the LCD caching as requested */
- if (priv->cache_type & FDT_LCD_CACHE_WRITE_THROUGH)
- type = DCACHE_WRITETHROUGH;
- else if (priv->cache_type & FDT_LCD_CACHE_WRITE_BACK)
- type = DCACHE_WRITEBACK;
- mmu_set_region_dcache_behaviour(priv->frame_buffer, plat->size, type);
+ mmu_set_region_dcache_behaviour(priv->frame_buffer, plat->size,
+ DCACHE_WRITETHROUGH);
/* Enable flushing after LCD writes if requested */
- video_set_flush_dcache(dev, priv->cache_type & FDT_LCD_CACHE_FLUSH);
+ video_set_flush_dcache(dev, true);
uc_priv->xsize = priv->width;
uc_priv->ysize = priv->height;
struct tegra_lcd_priv *priv = dev_get_priv(dev);
const void *blob = gd->fdt_blob;
struct display_timing *timing;
- int node = dev->of_offset;
+ int node = dev_of_offset(dev);
int panel_node;
int rgb;
int ret;
- priv->disp = (struct disp_ctlr *)dev_get_addr(dev);
+ priv->disp = (struct disp_ctlr *)devfdt_get_addr(dev);
if (!priv->disp) {
debug("%s: No display controller address\n", __func__);
return -EINVAL;
{
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
const void *blob = gd->fdt_blob;
- int node = dev->of_offset;
+ int node = dev_of_offset(dev);
int rgb;
rgb = fdt_subnode_offset(blob, node, "rgb");