]> git.sur5r.net Git - u-boot/blobdiff - include/asm-arm/arch-davinci/nand_defs.h
davinci_nand: cleanup I (minor)
[u-boot] / include / asm-arm / arch-davinci / nand_defs.h
index 187d3c3437bacd83e7d8f057c0e20f4fed020ed8..8450b8c69034c60de465314f670dbb73e42e17e5 100644 (file)
 #define        MASK_CLE        0x10
 #define        MASK_ALE        0x0a
 
-#define NAND_CE0CLE    ((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + 0x10))
-#define NAND_CE0ALE    ((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + 0x0a))
-#define NAND_CE0DATA   ((volatile u_int8_t *)CONFIG_SYS_NAND_BASE)
-
-typedef struct  {
-       u_int32_t       NRCSR;
-       u_int32_t       AWCCR;
-       u_int8_t        RSVD0[8];
-       u_int32_t       AB1CR;
-       u_int32_t       AB2CR;
-       u_int32_t       AB3CR;
-       u_int32_t       AB4CR;
-       u_int8_t        RSVD1[32];
-       u_int32_t       NIRR;
-       u_int32_t       NIMR;
-       u_int32_t       NIMSR;
-       u_int32_t       NIMCR;
-       u_int8_t        RSVD2[16];
-       u_int32_t       NANDFCR;
-       u_int32_t       NANDFSR;
-       u_int8_t        RSVD3[8];
-       u_int32_t       NANDF1ECC;
-       u_int32_t       NANDF2ECC;
-       u_int32_t       NANDF3ECC;
-       u_int32_t       NANDF4ECC;
-       u_int8_t        RSVD4[4];
-       u_int32_t       IODFTECR;
-       u_int32_t       IODFTGCR;
-       u_int8_t        RSVD5[4];
-       u_int32_t       IODFTMRLR;
-       u_int32_t       IODFTMRMR;
-       u_int32_t       IODFTMRMSBR;
-       u_int8_t        RSVD6[20];
-       u_int32_t       MODRNR;
-       u_int8_t        RSVD7[76];
-       u_int32_t       CE0DATA;
-       u_int32_t       CE0ALE;
-       u_int32_t       CE0CLE;
-       u_int8_t        RSVD8[4];
-       u_int32_t       CE1DATA;
-       u_int32_t       CE1ALE;
-       u_int32_t       CE1CLE;
-       u_int8_t        RSVD9[4];
-       u_int32_t       CE2DATA;
-       u_int32_t       CE2ALE;
-       u_int32_t       CE2CLE;
-       u_int8_t        RSVD10[4];
-       u_int32_t       CE3DATA;
-       u_int32_t       CE3ALE;
-       u_int32_t       CE3CLE;
-} nand_registers;
-
-typedef volatile nand_registers        *nandregs;
-
 #define NAND_READ_START                0x00
 #define NAND_READ_END          0x30
 #define NAND_STATUS            0x70