Nand mxc_nand add v1.1 controller support

[u-boot] / include / asm-arm / arch-mx27 / imx-regs.h

diff --git a/include/asm-arm/arch-mx27/imx-regs.h b/include/asm-arm/arch-mx27/imx-regs.h
index 5d2e0b36369819ed560d4bb7d2bb11622d849ead..8b9065f95c11e2dcdadd9978729b482ede941d33 100644 (file)
--- a/include/asm-arm/arch-mx27/imx-regs.h
+++ b/include/asm-arm/arch-mx27/imx-regs.h
@@ -1,5 +1,4 @@
 /*
- *
  * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  * (c) 2009 Ilya Yanok, Emcraft Systems <yanok@emcraft.com>
  *
@@ -29,6 +28,18 @@
 
 extern void imx_gpio_mode (int gpio_mode);
 
+#ifdef CONFIG_MXC_UART
+extern void mx27_uart_init_pins(void);
+#endif /* CONFIG_MXC_UART */
+
+#ifdef CONFIG_FEC_MXC
+extern void mx27_fec_init_pins(void);
+#endif /* CONFIG_FEC_MXC */
+
+#ifdef CONFIG_MXC_MMC
+extern void mx27_sd2_init_pins(void);
+#endif /* CONFIG_MXC_MMC */
+
 /* AIPI */
 struct aipi_regs {
        u32 psr0;
@@ -193,6 +204,7 @@ struct iim_regs {
        u32 res[0x1F0];
        u32 iim_bank_area0[0x100];
 };
+
 #endif
 
 #define IMX_IO_BASE            0x10000000
@@ -242,6 +254,16 @@ struct iim_regs {
 #define SDCS1_SEL      (1 << 1)
 #define SDCS0_SEL      (1 << 0)
 
+#ifndef __ASSEMBLY__
+static inline long mxc_get_nfc_info(void)
+{
+       struct system_control_regs *sc_regs =
+               (struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
+       return readl(&sc_regs->fmcr);
+}
+#define IMX_NFC_IS_16BIT(fmcr) (fmcr & NF_16BIT_SEL)
+#define IMX_NFC_IS_2KPAGE(fmcr) (!(fmcr & NF_FMS))
+#endif
 
 /* important definition of some bits of WCR */
 #define WCR_WDE 0x04
@@ -506,4 +528,3 @@ struct iim_regs {
 #define IIM1_SUID              1
 
 #endif                         /* _IMX_REGS_H */
-