#ifndef __IMMAP_5271__
#define __IMMAP_5271__
-/* Interrupt module registers
-*/
-typedef struct int_ctrl {
- uint int_icr1;
- uint int_icr2;
- uint int_icr3;
- uint int_icr4;
- uint int_isr;
- uint int_pitr;
- uint int_piwr;
- uchar res1[3];
- uchar int_pivr;
-} intctrl_t;
+#define MMAP_SCM (CONFIG_SYS_MBAR + 0x00000000)
+#define MMAP_SDRAM (CONFIG_SYS_MBAR + 0x00000040)
+#define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00000080)
+#define MMAP_DMA0 (CONFIG_SYS_MBAR + 0x00000100)
+#define MMAP_DMA1 (CONFIG_SYS_MBAR + 0x00000110)
+#define MMAP_DMA2 (CONFIG_SYS_MBAR + 0x00000120)
+#define MMAP_DMA3 (CONFIG_SYS_MBAR + 0x00000130)
+#define MMAP_UART0 (CONFIG_SYS_MBAR + 0x00000200)
+#define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000240)
+#define MMAP_UART2 (CONFIG_SYS_MBAR + 0x00000280)
+#define MMAP_I2C (CONFIG_SYS_MBAR + 0x00000300)
+#define MMAP_QSPI (CONFIG_SYS_MBAR + 0x00000340)
+#define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x00000400)
+#define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x00000440)
+#define MMAP_DTMR2 (CONFIG_SYS_MBAR + 0x00000480)
+#define MMAP_DTMR3 (CONFIG_SYS_MBAR + 0x000004C0)
+#define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00000C00)
+#define MMAP_INTC1 (CONFIG_SYS_MBAR + 0x00000D00)
+#define MMAP_INTCACK (CONFIG_SYS_MBAR + 0x00000F00)
+#define MMAP_FEC (CONFIG_SYS_MBAR + 0x00001000)
+#define MMAP_FECFIFO (CONFIG_SYS_MBAR + 0x00001400)
+#define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00100000)
+#define MMAP_CCM (CONFIG_SYS_MBAR + 0x00110000)
+#define MMAP_PLL (CONFIG_SYS_MBAR + 0x00120000)
+#define MMAP_EPORT (CONFIG_SYS_MBAR + 0x00130000)
+#define MMAP_WDOG (CONFIG_SYS_MBAR + 0x00140000)
+#define MMAP_PIT0 (CONFIG_SYS_MBAR + 0x00150000)
+#define MMAP_PIT1 (CONFIG_SYS_MBAR + 0x00160000)
+#define MMAP_PIT2 (CONFIG_SYS_MBAR + 0x00170000)
+#define MMAP_PIT3 (CONFIG_SYS_MBAR + 0x00180000)
+#define MMAP_MDHA (CONFIG_SYS_MBAR + 0x00190000)
+#define MMAP_RNG (CONFIG_SYS_MBAR + 0x001A0000)
+#define MMAP_SKHA (CONFIG_SYS_MBAR + 0x001B0000)
+#define MMAP_CAN1 (CONFIG_SYS_MBAR + 0x001C0000)
+#define MMAP_ETPU (CONFIG_SYS_MBAR + 0x001D0000)
+#define MMAP_CAN2 (CONFIG_SYS_MBAR + 0x001F0000)
-/* Timer module registers
- */
-typedef struct timer_ctrl {
- ushort timer_tmr;
- ushort res1;
- ushort timer_trr;
- ushort res2;
- ushort timer_tcap;
- ushort res3;
- ushort timer_tcn;
- ushort res4;
- ushort timer_ter;
- uchar res5[14];
-} timer_t;
+#include <asm/coldfire/eport.h>
+#include <asm/coldfire/flexbus.h>
+#include <asm/coldfire/intctrl.h>
+#include <asm/coldfire/mdha.h>
+#include <asm/coldfire/qspi.h>
+#include <asm/coldfire/rng.h>
+#include <asm/coldfire/skha.h>
- /* Fast ethernet controller registers
- */
-typedef struct fec {
- uint res1;
- uint fec_ievent;
- uint fec_imask;
- uint res2;
- uint fec_r_des_active;
- uint fec_x_des_active;
- uint res3[3];
- uint fec_ecntrl;
- uint res4[6];
- uint fec_mii_data;
- uint fec_mii_speed;
- uint res5[7];
- uint fec_mibc;
- uint res6[7];
- uint fec_r_cntrl;
- uint res7[15];
- uint fec_x_cntrl;
- uint res8[7];
- uint fec_addr_low;
- uint fec_addr_high;
- uint fec_opd;
- uint res9[10];
- uint fec_ihash_table_high;
- uint fec_ihash_table_low;
- uint fec_ghash_table_high;
- uint fec_ghash_table_low;
- uint res10[7];
- uint fec_tfwr;
- uint res11;
- uint fec_r_bound;
- uint fec_r_fstart;
- uint res12[11];
- uint fec_r_des_start;
- uint fec_x_des_start;
- uint fec_r_buff_size;
-} fec_t;
-#endif /* __IMMAP_5271__ */
+#endif /* __IMMAP_5271__ */