* downloading RAM microcode.
*/
#define CPM_DATAONLY_BASE ((uint)128)
-#define CPM_DATAONLY_SIZE ((uint)(16 * 1024) - CPM_DATAONLY_BASE)
#define CPM_DP_NOSPACE ((uint)0x7fffffff)
+#ifndef CONFIG_MPC8272_FAMILY
+#define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
#define CPM_FCC_SPECIAL_BASE ((uint)0x0000b000)
+#else /* 8247/48/71/72 */
+#define CPM_DATAONLY_SIZE ((uint)(4 * 1024) - CPM_DATAONLY_BASE)
+#define CPM_FCC_SPECIAL_BASE ((uint)0x00009000)
+#endif /* !CONFIG_MPC8272_FAMILY */
/* The number of pages of host memory we allocate for CPM. This is
* done early in kernel initialization to get physically contiguous
/* Parameter RAM offsets from the base.
*/
-#ifndef CFG_CPM_POST_WORD_ADDR
+#ifndef CONFIG_SYS_CPM_POST_WORD_ADDR
#define CPM_POST_WORD_ADDR 0x80FC /* steal a long at the end of SCC1 */
#else
-#define CPM_POST_WORD_ADDR CFG_CPM_POST_WORD_ADDR
+#define CPM_POST_WORD_ADDR CONFIG_SYS_CPM_POST_WORD_ADDR
#endif
-#ifndef CFG_CPM_BOOTCOUNT_ADDR
+#ifndef CONFIG_SYS_CPM_BOOTCOUNT_ADDR
#define CPM_BOOTCOUNT_ADDR (CPM_POST_WORD_ADDR - 2*sizeof(ulong))
#else
-#define CPM_BOOTCOUNT_ADDR CFG_CPM_BOOTCOUNT_ADDR
+#define CPM_BOOTCOUNT_ADDR CONFIG_SYS_CPM_BOOTCOUNT_ADDR
#endif
#define PROFF_SCC1 ((uint)0x8000)
#define BD_SCC_TX_LAST ((ushort)0x0800)
+/* SCC as HDLC controller - taken from commproc.h
+ */
+typedef struct scc_hdlc {
+ sccp_t sh_genscc;
+ /*
+ * HDLC specific parameter RAM
+ */
+ uchar res[4]; /* reserved */
+ ulong sh_cmask; /* CRC constant */
+ ulong sh_cpres; /* CRC preset */
+ ushort sh_disfc; /* discarded frame counter */
+ ushort sh_crcec; /* CRC error counter */
+ ushort sh_abtsc; /* abort sequence counter */
+ ushort sh_nmarc; /* nonmatching address rx cnt */
+ ushort sh_retrc; /* frame retransmission cnt */
+ ushort sh_mflr; /* maximum frame length reg */
+ ushort sh_maxcnt; /* maximum length counter */
+ ushort sh_rfthr; /* received frames threshold */
+ ushort sh_rfcnt; /* received frames count */
+ ushort sh_hmask; /* user defined frm addr mask */
+ ushort sh_haddr1; /* user defined frm address 1 */
+ ushort sh_haddr2; /* user defined frm address 2 */
+ ushort sh_haddr3; /* user defined frm address 3 */
+ ushort sh_haddr4; /* user defined frm address 4 */
+ ushort tmp; /* temp */
+ ushort tmp_mb; /* temp */
+} scc_hdlc_t;
+
/* How about some FCCs.....
*/
#define FCC_GFMR_DIAG_NORM ((uint)0x00000000)
#define FCC_PSMR_PRO ((uint)0x00400000) /* Promiscuous Enable */
#define FCC_PSMR_FCE ((uint)0x00200000) /* Flow Control Enable */
#define FCC_PSMR_RSH ((uint)0x00100000) /* Receive Short Frames */
+#define FCC_PSMR_RMII ((uint)0x00020000) /* Use RMII interface */
#define FCC_PSMR_CAM ((uint)0x00000400) /* CAM enable */
#define FCC_PSMR_BRO ((uint)0x00000200) /* Broadcast pkt discard */
#define FCC_PSMR_ENCRC ((uint)0x00000080) /* Use 32-bit CRC */