Merge branch 'mpc85xx'

[u-boot] / include / asm-ppc / immap_85xx.h

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 2f10e9591d21eb0ecc29f73c920e5ac386a086b2..7a4345a74085e9d0c034930c6d1873fff904aa2f 100644 (file)
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -246,7 +246,6 @@ typedef struct ccsr_lbc {
 
 /*
  * PCI Registers(0x8000-0x9000)
- * Omitting Reserved(0x9000-0x2_0000)
  */
 typedef struct ccsr_pcix {
        uint    cfg_addr;       /* 0x8000 - PCIX Configuration Address Register */
@@ -309,9 +308,27 @@ typedef struct ccsr_pcix {
        uint    peextaddrcr;    /* 0x8e14 - PCIX  Error Extended Address Capture Register */
        uint    pedlcr;         /* 0x8e18 - PCIX Error Data Low Capture Register */
        uint    pedhcr;         /* 0x8e1c - PCIX Error Error Data High Capture Register */
-       char    res11[94688];
+       uint    gas_timr;       /* 0x8e20 - PCIX Gasket Timer Register */
+       char    res11[476];
 } ccsr_pcix_t;
 
+#define PCIX_COMMAND   0x62
+#define POWAR_EN       0x80000000
+#define POWAR_IO_READ  0x00080000
+#define POWAR_MEM_READ 0x00040000
+#define POWAR_IO_WRITE 0x00008000
+#define POWAR_MEM_WRITE        0x00004000
+#define POWAR_MEM_512M 0x0000001c
+#define POWAR_IO_1M    0x00000013
+
+#define PIWAR_EN       0x80000000
+#define PIWAR_PF       0x20000000
+#define PIWAR_LOCAL    0x00f00000
+#define PIWAR_READ_SNOOP       0x00050000
+#define PIWAR_WRITE_SNOOP      0x00005000
+#define PIWAR_MEM_2G           0x0000001e
+
+
 /*
  * L2 Cache Registers(0x2_0000-0x2_1000)
  */
@@ -1572,6 +1589,8 @@ typedef struct ccsr_gur {
        char    res15[61651];
 } ccsr_gur_t;
 
+#define PORDEVSR_PCI   (0x00800000)    /* PCI Mode */
+
 typedef struct immap {
        ccsr_local_ecm_t        im_local_ecm;
        ccsr_ddr_t              im_ddr;
@@ -1579,6 +1598,8 @@ typedef struct immap {
        ccsr_duart_t            im_duart;
        ccsr_lbc_t              im_lbc;
        ccsr_pcix_t             im_pcix;
+       ccsr_pcix_t             im_pcix2;
+       char                    reserved[90112];
        ccsr_l2cache_t          im_l2cache;
        ccsr_dma_t              im_dma;
        ccsr_tsec_t             im_tsec1;