i.MX31: Enable SPI and MC13783/RTC support for the Litekit board

[u-boot] / include / commproc.h

diff --git a/include/commproc.h b/include/commproc.h
index 061468e752d29c2d295b8aeea0578fd922081cb4..32a3e1c82a84bbdf59e20720fed94ff889090b89 100644 (file)
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -159,6 +159,8 @@ typedef struct smc_uart {
        ushort  smc_brkec;      /* rcv'd break condition counter */
        ushort  smc_brkcr;      /* xmt break count register */
        ushort  smc_rmask;      /* Temporary bit mask */
+       u_char  res1[8];
+       ushort  smc_rpbase;     /* Relocation pointer */
 } smc_uart_t;
 
 /* Function code bits.
@@ -1120,6 +1122,32 @@ typedef struct scc_enet {
 #define SICR_ENET_CLKRT        ((uint)0x0000003d)
 #endif /* CONFIG_MBX */
 
+/***  MGSUVD  *********************************************************/
+
+/* The MGSUVD Service Module uses SCC3 for Ethernet */
+
+#ifdef CONFIG_MGSUVD
+#define PROFF_ENET     PROFF_SCC3              /* Ethernet on SCC3 */
+#define CPM_CR_ENET    CPM_CR_CH_SCC3
+#define SCC_ENET       2
+#define PA_ENET_RXD    ((ushort)0x0010)        /* PA 11 */
+#define PA_ENET_TXD    ((ushort)0x0020)        /* PA 10 */
+#define PA_ENET_RCLK   ((ushort)0x1000)        /* PA  3 CLK 5 */
+#define PA_ENET_TCLK   ((ushort)0x2000)        /* PA  2 CLK 6 */
+
+#define PC_ENET_TENA   ((ushort)0x0004)        /* PC 13 */
+
+#define PC_ENET_RENA   ((ushort)0x0200)        /* PC  6 */
+#define PC_ENET_CLSN   ((ushort)0x0100)        /* PC  7 */
+
+/* Control bits in the SICR to route TCLK (CLK6) and RCLK (CLK5) to
+ * SCC3.  Also, make sure GR3 (bit 8) and SC3 (bit 9) are zero.
+ */
+#define SICR_ENET_MASK ((uint)0x00FF0000)
+#define SICR_ENET_CLKRT        ((uint)0x00250000)
+#endif /* CONFIG_MGSUVD */
+
+
 /***  MHPC  ********************************************************/
 
 #if defined(CONFIG_MHPC)
@@ -1405,21 +1433,24 @@ typedef struct scc_enet {
 
 #endif /* CONFIG_SXNI855T */
 
-/***  MVS1, TQM823L/M, TQM850L/M, ETX094, R360MPI  *******************/
+/***  MVS1, TQM823L/M, TQM850L/M, TQM885D, ETX094, R360MPI  **********/
 
 #if (defined(CONFIG_MVS) && CONFIG_MVS < 2) || \
     defined(CONFIG_R360MPI) || defined(CONFIG_RBC823)  || \
     defined(CONFIG_TQM823L) || defined(CONFIG_TQM823M) || \
     defined(CONFIG_TQM850L) || defined(CONFIG_TQM850M) || \
-    defined(CONFIG_ETX094)  || defined(CONFIG_RRVISION)|| \
-    defined(CONFIG_VIRTLAB2)||                           \
+    defined(CONFIG_TQM885D) || defined(CONFIG_ETX094)  || \
+    defined(CONFIG_RRVISION)|| defined(CONFIG_VIRTLAB2)|| \
    (defined(CONFIG_LANTEC) && CONFIG_LANTEC < 2)
+
 /* Bits in parallel I/O port registers that have to be set/cleared
  * to configure the pins for SCC2 use.
  */
 #define        PROFF_ENET      PROFF_SCC2
 #define        CPM_CR_ENET     CPM_CR_CH_SCC2
+#if (!defined(CONFIG_TK885D))  /* TK885D does not use SCC Ethernet */
 #define        SCC_ENET        1
+#endif
 #define PA_ENET_RXD    ((ushort)0x0004)        /* PA 13 */
 #define PA_ENET_TXD    ((ushort)0x0008)        /* PA 12 */
 #define PA_ENET_RCLK   ((ushort)0x0100)        /* PA  7 */
@@ -1438,6 +1469,11 @@ typedef struct scc_enet {
  */
 #define SICR_ENET_MASK ((uint)0x0000ff00)
 #define SICR_ENET_CLKRT        ((uint)0x00002600)
+
+# ifdef CONFIG_FEC_ENET                /* Use FEC for Fast Ethernet */
+#define FEC_ENET
+# endif        /* CONFIG_FEC_ENET */
+
 #endif /* CONFIG_MVS v1, CONFIG_TQM823L/M, CONFIG_TQM850L/M, etc. */
 
 /***  TQM855L/M, TQM860L/M, TQM862L/M, TQM866L/M  *********************/