]> git.sur5r.net Git - u-boot/blobdiff - include/configs/APC405.h
fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo features
[u-boot] / include / configs / APC405.h
index 41eaaabfcd3a88c1375d8368bb73e98f6edc0a90..bb0238f4f04a4448b05906e44ee98d52d2a94360 100644 (file)
 #define CONFIG_NET_MULTI       1
 #undef  CONFIG_HAS_ETH1
 
+#define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                0       /* PHY address                  */
 #define CONFIG_LXT971_NO_SLEEP 1
 /*
  * FLASH organization
  */
-#ifndef __ASSEMBLY__
-extern int flash_banks;
-#endif
-
 #define CONFIG_SYS_FLASH_BASE          0xFE000000
 #define CONFIG_SYS_FLASH_CFI           1       /* Flash is CFI conformant */
 #define CONFIG_FLASH_CFI_DRIVER        1       /* Use the common driver */
 #define CONFIG_SYS_MAX_FLASH_SECT      256     /* max num of sects on one chip */
-#define CONFIG_SYS_MAX_FLASH_BANKS     flash_banks /* max num of flash banks */
-                                           /* updated in board_early_init_r */
 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2
 #define CONFIG_SYS_FLASH_QUIET_TEST    1
 #define CONFIG_SYS_FLASH_INCREMENT     0x01000000
@@ -304,6 +299,7 @@ extern int flash_banks;
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C                        /* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
 #define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE           0x7F