Merge branch 'next' of ../custodians into next

[u-boot] / include / configs / IDS8247.h

diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h
index 4c4af054b2a79ecd87add46120b3195727288e68..4e73941fcf8fcd059f7e1bcb0762e64a78512872 100644 (file)
--- a/include/configs/IDS8247.h
+++ b/include/configs/IDS8247.h
@@ -125,8 +125,6 @@
 #define CONFIG_OF_LIBFDT       1
 #define CONFIG_OF_BOARD_SETUP  1
 
-#define OF_CPU "PowerPC,8247@0"
-#define OF_SOC "soc@f0000000"
 #define OF_TBCLK       (bd->bi_busfreq / 4)
 #define OF_STDOUT_PATH "/soc@f0000000/serial8250@e0008000"
 
@@ -229,7 +227,7 @@
 #define CONFIG_SYS_FLASH_CFI                           /* The flash is CFI compatible  */
 #define CONFIG_FLASH_CFI_DRIVER                        /* Use common CFI driver        */
 #define CONFIG_SYS_FLASH_BANKS_LIST    { 0xFF800000 }
-#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT      1
+#define CONFIG_SYS_MAX_FLASH_BANKS     1       /* max number of memory banks         */
 /* What should the base address of the main FLASH be and how big is
  * it (in MBytes)? This must contain TEXT_BASE from board/ids8247/config.mk
  * The main FLASH is whichever is connected to *CS0.
@@ -244,7 +242,6 @@
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
-#define CONFIG_SYS_MAX_FLASH_BANKS     1       /* max num of memory banks      */
 #define CONFIG_SYS_MAX_FLASH_SECT      128     /* max num of sects on one chip */
 
 #define CONFIG_SYS_FLASH_ERASE_TOUT    240000  /* Flash Erase Timeout (in ms)  */
@@ -265,8 +262,6 @@
 #define CONFIG_SYS_NAND0_BASE 0xE1000000
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND devices           */
 
-#define CONFIG_SYS_64BIT_VSPRINTF              /* needed for nand_util.c */
-
 #endif /* CONFIG_CMD_NAND */
 
 /*-----------------------------------------------------------------------