]> git.sur5r.net Git - u-boot/blobdiff - include/configs/IP860.h
Merge branch 'next' of ../custodians into next
[u-boot] / include / configs / IP860.h
index b9c57132d7ae898f2b4bbd82db40054b8d7fd81b..ed6b7fde9c72baec1cb005c9279cfc95801528bf 100644 (file)
@@ -36,6 +36,7 @@
 #define CONFIG_MPC860          1       /* This is a MPC860 CPU         */
 #define CONFIG_IP860           1       /* ...on a IP860 board          */
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* Call board_early_init_f      */
+#define CONFIG_RESET_PHY_R     1       /* Call reset_phy()             */
 
 #define        CONFIG_8xx_CONS_SMC1    1       /* Console is on SMC1           */
 #define CONFIG_BAUDRATE                9600
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CACHELINE_SHIFT     4       /* log base 2 of the above value        */
 #endif
+#define CONFIG_SYS_DELAYED_ICACHE      1       /* enable ICache not before
+                                                * running in RAM.
+                                                */
 
 /*-----------------------------------------------------------------------
  * SYPCR - System Protection Control                           11-9
@@ -371,6 +375,8 @@ extern  unsigned long           ip860_get_clk_freq (void);
 #define SRAM_SIZE      (1 + (~(CONFIG_SYS_OR3 & BR_BA_MSK)))
 #define CONFIG_SYS_OR3_PRELIM  CONFIG_SYS_OR3                  /* Make sure to map early */
 #define CONFIG_SYS_BR3_PRELIM  CONFIG_SYS_BR3                  /* in case it's used for ENV */
+#define        CONFIG_SYS_SRAM_BASE    SRAM_BASE
+#define        CONFIG_SYS_SRAM_SIZE    SRAM_SIZE
 
 /*
  * BR4/OR4 - Board Control & Status (8 bit)