microblaze: Enable TFTP put command

[u-boot] / include / configs / IPHASE4539.h

diff --git a/include/configs/IPHASE4539.h b/include/configs/IPHASE4539.h
index e19a3df57579ddb4664a7def8701f0edd505e222..d9663062b982d856a71ed829937781236dbc0249 100644 (file)
--- a/include/configs/IPHASE4539.h
+++ b/include/configs/IPHASE4539.h
@@ -82,8 +82,8 @@
  * - Select bus for bd/buffers (see 28-13)
  * - Half duplex
  */
-# define CONFIG_SYS_CMXFCR_MASK        (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK)
-# define CONFIG_SYS_CMXFCR_VALUE       (CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16)
+# define CONFIG_SYS_CMXFCR_MASK3       (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK)
+# define CONFIG_SYS_CMXFCR_VALUE3      (CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16)
 # define CONFIG_SYS_CPMFCR_RAMTYPE     0
 # define CONFIG_SYS_FCC_PSMR           (FCC_PSMR_FDE|FCC_PSMR_LPB)
 
@@ -247,8 +247,7 @@
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_IMMR
 #define CONFIG_SYS_INIT_RAM_SIZE       0x4000  /* Size of used area in DPRAM   */
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------