arm: socfpga: Add USB and UDC support for Cyclone V DK

[u-boot] / include / configs / M5253EVBE.h

diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h
index 1dee3ef2bddd2c1f850f0feabe835b90a6d6be75..fabfdb93dbdbfdc6e39a82fd2afb4d35ea57b8f3 100644 (file)
--- a/include/configs/M5253EVBE.h
+++ b/include/configs/M5253EVBE.h
@@ -2,23 +2,7 @@
  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  * Hayden Fraser (Hayden.Fraser@freescale.com)
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef _M5253EVBE_H
@@ -33,7 +17,6 @@
 #define CONFIG_MCFUART
 #define CONFIG_SYS_UART_PORT           (0)
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_SYS_BAUDRATE_TABLE      { 9600 , 19200 , 38400 , 57600, 115200 }
 
 #undef CONFIG_WATCHDOG         /* disable watchdog */
 
@@ -93,7 +76,6 @@
 #define CONFIG_SYS_ATA_ALT_OFFSET      0xC0    /* Offset for alternate registers */
 #define CONFIG_SYS_ATA_STRIDE          4       /* Interval between registers */
 
-#define CONFIG_SYS_PROMPT              "=> "
 #define CONFIG_SYS_LONGHELP            /* undef to save memory */
 
 #if defined(CONFIG_CMD_KGDB)
@@ -110,8 +92,6 @@
 #define CONFIG_SYS_MEMTEST_START       0x400
 #define CONFIG_SYS_MEMTEST_END         0x380000
 
-#define CONFIG_SYS_HZ                  1000
-
 #undef CONFIG_SYS_PLL_BYPASS           /* bypass PLL for test purpose */
 #define CONFIG_SYS_FAST_CLK
 #ifdef CONFIG_SYS_FAST_CLK
@@ -136,8 +116,7 @@
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x20000000
 #define CONFIG_SYS_INIT_RAM_SIZE       0x10000 /* Size of used area in internal SRAM */
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*