CMD: Fix typo KGBD -> KGDB on debris board

[u-boot] / include / configs / M5329EVB.h

diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 6717ef3efa70146abdfd9a0f0479e344ac23083b..29b9b2a69b34a4a6c43d9cbafc2ae7343a4bfe72 100644 (file)
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -60,7 +60,7 @@
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_REGINFO
 
-#ifdef NANDFLASH_SIZE
+#ifdef CONFIG_NANDFLASH_SIZE
 #      define CONFIG_CMD_NAND
 #endif
 
@@ -68,7 +68,6 @@
 
 #define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
-#      define CONFIG_NET_MULTI         1
 #      define CONFIG_MII               1
 #      define CONFIG_MII_INIT          1
 #      define CONFIG_SYS_DISCOVER_PHY
@@ -124,8 +123,8 @@
        "u-boot=u-boot.bin\0"   \
        "load=tftp ${loadaddr) ${u-boot}\0"     \
        "upd=run load; run prog\0"      \
-       "prog=prot off 0 2ffff;"        \
-       "era 0 2ffff;"  \
+       "prog=prot off 0 3ffff;"        \
+       "era 0 3ffff;"  \
        "cp.b ${loadaddr} 0 ${filesize};"       \
        "save\0"        \
        ""
@@ -164,8 +163,7 @@
 #define CONFIG_SYS_INIT_RAM_ADDR       0x80000000
 #define CONFIG_SYS_INIT_RAM_SIZE       0x8000  /* Size of used area in internal SRAM */
 #define CONFIG_SYS_INIT_RAM_CTRL       0x221
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     ((CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) - 0x10)
+#define CONFIG_SYS_GBL_DATA_OFFSET     ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
@@ -211,7 +209,7 @@
 #      define CONFIG_SYS_FLASH_PROTECTION      /* "Real" (hardware) sectors protection */
 #endif
 
-#ifdef NANDFLASH_SIZE
+#ifdef CONFIG_NANDFLASH_SIZE
 #      define CONFIG_SYS_MAX_NAND_DEVICE       1
 #      define CONFIG_SYS_NAND_BASE             CONFIG_SYS_CS2_BASE
 #      define CONFIG_SYS_NAND_SIZE             1
@@ -267,9 +265,9 @@
 #define CONFIG_SYS_CS1_MASK            0x001f0001
 #define CONFIG_SYS_CS1_CTRL            0x002A3780
 
-#ifdef NANDFLASH_SIZE
+#ifdef CONFIG_NANDFLASH_SIZE
 #define CONFIG_SYS_CS2_BASE            0x20000000
-#define CONFIG_SYS_CS2_MASK            ((NANDFLASH_SIZE << 20) | 1)
+#define CONFIG_SYS_CS2_MASK            ((CONFIG_NANDFLASH_SIZE << 20) | 1)
 #define CONFIG_SYS_CS2_CTRL            0x00001f60
 #endif