#define CONFIG_405GP 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_MIP405 1 /* ...on a MIP405 board */
+
+#define CONFIG_SYS_TEXT_BASE 0xFFF80000
+
/***********************************************************
* Note that it may also be a MIP405T board which is a subset of the
* MIP405
#if !defined(CONFIG_MIP405T)
#define CONFIG_CMD_USB
- #define CONFIG_CMD_DOC
#endif
-#define CONFIG_NAND_LEGACY
-
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
/**************************************************************
***************************************************************/
#define CONFIG_HARD_I2C /* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 916667
#define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000
#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */
-#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of On Chip SRAM */
-#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/* reserve some memory for POST and BOOT limit info */
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32)
-#ifdef CONFIG_POST /* reserve one word for POST Info */
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 4)
-#endif
-
#ifdef CONFIG_BOOTCOUNT_LIMIT /* reserve 2 word for bootcount limit */
#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12)
#endif
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-
/***********************************************************************
* External peripheral base address
***********************************************************************/
#define CONFIG_PHY_ADDR 1 /* PHY address */
#define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */
#define CONFIG_PHY_CMD_DELAY 40 /* Intel LXT971A needs this */
+#define CONFIG_NET_MULTI
/************************************************************
* RTC
***********************************************************/
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION /* Experimental */
-/************************************************************
- * Disk-On-Chip configuration
- ************************************************************/
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
-#define CONFIG_SYS_DOC_SHORT_TIMEOUT
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
/************************************************************
* Keyboard support
************************************************************/
#define CONFIG_USB_STORAGE
/* Enable needed helper functions */
-#define CONFIG_SYS_DEVICE_DEREGISTER /* needs device_deregister */
+#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
#endif
/************************************************************
* Debug support