added the config File for the MUNICes board.

[u-boot] / include / configs / MPC8313ERDB.h

diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 81db96f4661e79d4cae14a1c9b103f01006c46ab..455bbe0cf7da3173a83f5af79377f598f2698f0c 100644 (file)
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -113,12 +113,12 @@
                                /* 0x03200064 */
 #if defined(CONFIG_DDR_2T_TIMING)
 #define CFG_SDRAM_CFG          ( SDRAM_CFG_SREN \
-                               | 3 << SDRAM_CFG_SDRAM_TYPE_SHIFT \
+                               | SDRAM_CFG_SDRAM_TYPE_DDR2 \
                                | SDRAM_CFG_2T_EN \
                                | SDRAM_CFG_DBW_32 )
 #else
 #define CFG_SDRAM_CFG          ( SDRAM_CFG_SREN \
-                               | 3 << SDRAM_CFG_SDRAM_TYPE_SHIFT \
+                               | SDRAM_CFG_SDRAM_TYPE_DDR2 \
                                | SDRAM_CFG_32_BE )
                                /* 0x43080000 */
 #endif
@@ -178,6 +178,7 @@
 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET
 
+/* CFG_MONITOR_LEN must be a multiple of CFG_ENV_SECT_SIZE */
 #define CFG_MONITOR_LEN                (256 * 1024)    /* Reserve 256 kB for Mon */
 #define CFG_MALLOC_LEN         (512 * 1024)    /* Reserved for malloc */
 
@@ -191,7 +192,7 @@
 
 #define CFG_LBC_MRTPR  0x20000000  /*TODO */   /* LB refresh timer prescal, 266MHz/32 */
 
-/* drivers/nand/nand.c */
+/* drivers/mtd/nand/nand.c */
 #define CFG_NAND_BASE          0xE2800000      /* 0xF0000000 */
 #define CFG_MAX_NAND_DEVICE    1
 #define NAND_MAX_CHIPS         1
@@ -228,16 +229,9 @@
 #define CFG_LBLAWAR3_PRELIM    0x8000000E      /* 32KB  */
 
 /* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE    1
+#define CONFIG_OF_LIBFDT       1
 #define CONFIG_OF_BOARD_SETUP  1
-
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE  8192
-
-#define OF_CPU                 "PowerPC,8313@0"
-#define OF_SOC                 "soc8313@e0000000"
-#define OF_TBCLK               (bd->bi_busfreq / 4)
-#define OF_STDOUT_PATH         "/soc8313@e0000000/serial@4500"
+#define CONFIG_OF_STDOUT_VIA_ALIAS     1
 
 /*
  * Serial Port
@@ -310,6 +304,8 @@
 #define CONFIG_TSEC2_NAME      "TSEC1"
 #define TSEC1_PHY_ADDR                 0x1c
 #define TSEC2_PHY_ADDR                 4
+#define TSEC1_FLAGS                    TSEC_GIGABIT
+#define TSEC2_FLAGS                    TSEC_GIGABIT
 #define TSEC1_PHYIDX                   0
 #define TSEC2_PHYIDX                   0
 
@@ -327,7 +323,7 @@
  */
 #ifndef CFG_RAMBOOT
        #define CFG_ENV_IS_IN_FLASH     1
-       #define CFG_ENV_ADDR            (CFG_MONITOR_BASE + 0x40000)
+       #define CFG_ENV_ADDR            (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
        #define CFG_ENV_SECT_SIZE       0x10000 /* 64K(one sector) for env */
        #define CFG_ENV_SIZE            0x2000
 
@@ -390,11 +386,6 @@
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                16384
-#define CFG_CACHELINE_SIZE     32
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-
 #define CFG_RCWH_PCIHOST 0x80000000    /* PCIHOST  */
 
 #ifdef CFG_66MHZ
@@ -507,6 +498,7 @@
 
 #define CONFIG_ETHADDR         00:E0:0C:00:95:01
 #define CONFIG_HAS_ETH1
+#define CONFIG_HAS_ETH0
 #define CONFIG_ETH1ADDR                00:E0:0C:00:95:02
 
 #define CONFIG_IPADDR          10.0.0.2