]> git.sur5r.net Git - u-boot/blobdiff - include/configs/MPC832XEMDS.h
ARM: OMAP3: Revamp IGEP module default configuration
[u-boot] / include / configs / MPC832XEMDS.h
index 6009d44be0630062e459fda1c811de84b8057f80..f136a8e16a0832ed12d192292853e9c123b012cf 100644 (file)
  */
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       0xE6000000      /* Initial RAM address */
-#define CONFIG_SYS_INIT_RAM_END        0x1000          /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE       0x100           /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000          /* Size of used area in RAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 
 /*
  * Local Bus Configuration & Clock Setup
 #define CONFIG_SYS_UEC1_TX_CLK         QE_CLK10
 #define CONFIG_SYS_UEC1_ETH_TYPE       FAST_ETH
 #define CONFIG_SYS_UEC1_PHY_ADDR       3
-#define CONFIG_SYS_UEC1_INTERFACE_TYPE MII
+#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_MII
 #define CONFIG_SYS_UEC1_INTERFACE_SPEED        100
 #endif
 
 #define CONFIG_SYS_UEC2_TX_CLK         QE_CLK8
 #define CONFIG_SYS_UEC2_ETH_TYPE       FAST_ETH
 #define CONFIG_SYS_UEC2_PHY_ADDR       4
-#define CONFIG_SYS_UEC2_INTERFACE_TYPE MII
+#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_MII
 #define CONFIG_SYS_UEC2_INTERFACE_SPEED        100
 #endif