Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx

[u-boot] / include / configs / MPC8349EMDS.h

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index cf552c2487a7faec8610a55264122b3b8c765bfb..37e3ca40b3f52c3ec57d2b57c807a764c8ac7aa4 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -39,7 +39,7 @@
 #define CONFIG_MPC8349EMDS     1       /* MPC8349EMDS board specific */
 
 #undef CONFIG_PCI
-#undef CONFIG_MPC83XX_PCI2             /* support for 2nd PCI controller */
+#undef CONFIG_MPC83XX_PCI2             /* support for 2nd PCI controller */
 
 #define PCI_66M
 #ifdef PCI_66M
@@ -157,7 +157,7 @@
                                (2 << BR_PS_SHIFT) |    /* 16 bit port size */   \
                                BR_V)                   /* valid */
 #define CFG_OR0_PRELIM         ((~(CFG_FLASH_SIZE - 1) << 20) | OR_UPM_XAM | \
-                               OR_GPCM_CSNT | OR_GPCM_ACS_0b11 | OR_GPCM_XACS | OR_GPCM_SCY_15 | \
+                               OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS | OR_GPCM_SCY_15 | \
                                OR_GPCM_TRLX | OR_GPCM_EHTR | OR_GPCM_EAD)
 #define CFG_LBLAWBAR0_PRELIM   CFG_FLASH_BASE  /* window base at flash base */
 #define CFG_LBLAWAR0_PRELIM    0x80000018      /* 32 MB window size */
@@ -414,7 +414,7 @@
 #if !defined(CONFIG_PCI_PNP)
        #define PCI_ENET0_IOADDR        0xFIXME
        #define PCI_ENET0_MEMADDR       0xFIXME
-       #define PCI_IDSEL_NUMBER        0x0c    /* slot0->3(IDSEL)=12->15 */
+       #define PCI_IDSEL_NUMBER        0x0c    /* slot0->3(IDSEL)=12->15 */
 #endif
 
 #undef CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup */
@@ -626,6 +626,7 @@
 
 
 #define CFG_HID2 HID2_HBE
+#define CONFIG_HIGH_BATS       1       /* High BATs supported */
 
 /* DDR @ 0x00000000 */
 #define CFG_IBAT0L     (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)