[Motion-PRO] Change IPB clock frequency from 50MHz to 100MHz. This

[u-boot] / include / configs / MPC8349EMDS.h

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 66f164660ee038f07b4caaac52b9e631a7a3d0f5..5bed2d0a29fa05b37f276ce58574c48ecc661d99 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -36,6 +36,7 @@
  */
 #define CONFIG_E300            1       /* E300 Family */
 #define CONFIG_MPC83XX         1       /* MPC83XX family */
+#define CONFIG_MPC834X         1       /* MPC834X family */
 #define CONFIG_MPC8349         1       /* MPC8349 specific */
 #define CONFIG_MPC8349EMDS     1       /* MPC8349EMDS board specific */
 
@@ -59,9 +60,20 @@
 #endif
 #endif
 
+#define CFG_SCCR_INIT          (SCCR_DEFAULT & (~SCCR_CLK_MASK))
+#define CFG_SCCR_TSEC1CM       SCCR_TSEC1CM_1  /* TSEC1 clock setting */
+#define CFG_SCCR_TSEC2CM       SCCR_TSEC2CM_1  /* TSEC2 clock setting */
+#define CFG_SCCR_ENCCM         SCCR_ENCCM_3    /* ENC clock setting */
+#define CFG_SCCR_USBCM         SCCR_USBCM_3    /* USB clock setting */
+#define CFG_SCCR_VAL           ( CFG_SCCR_INIT         \
+                               | CFG_SCCR_TSEC1CM      \
+                               | CFG_SCCR_TSEC2CM      \
+                               | CFG_SCCR_ENCCM        \
+                               | CFG_SCCR_USBCM        )
+
 #define CONFIG_BOARD_EARLY_INIT_F              /* call board_pre_init */
 
-#define CFG_IMMRBAR            0xE0000000
+#define CFG_IMMR               0xE0000000
 
 #undef CFG_DRAM_TEST                           /* memory test, takes time */
 #define CFG_MEMTEST_START      0x00000000      /* memtest region */
@@ -299,8 +311,8 @@
 #define CFG_BAUDRATE_TABLE  \
        {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
 
-#define CFG_NS16550_COM1        (CFG_IMMRBAR+0x4500)
-#define CFG_NS16550_COM2        (CFG_IMMRBAR+0x4600)
+#define CFG_NS16550_COM1        (CFG_IMMR+0x4500)
+#define CFG_NS16550_COM2        (CFG_IMMR+0x4600)
 
 /* Use the HUSH parser */
 #define CFG_HUSH_PARSER
@@ -308,20 +320,35 @@
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_FLAT_TREE    1
+#define CONFIG_OF_BOARD_SETUP  1
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE  8192
+
+#define OF_CPU                 "PowerPC,8349@0"
+#define OF_SOC                 "soc8349@e0000000"
+#define OF_TBCLK               (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH         "/soc8349@e0000000/serial@4500"
+
 /* I2C */
 #define CONFIG_HARD_I2C                        /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
+#define CONFIG_FSL_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_SLAVE          0x7F
-#define CFG_I2C_NOPROBES       {0x69}  /* Don't probe these addrs */
+#define CFG_I2C_NOPROBES       {{0,0x69}}      /* Don't probe these addrs */
 #define CFG_I2C_OFFSET         0x3000
 #define CFG_I2C2_OFFSET                0x3100
 
 /* TSEC */
 #define CFG_TSEC1_OFFSET 0x24000
-#define CFG_TSEC1 (CFG_IMMRBAR+CFG_TSEC1_OFFSET)
+#define CFG_TSEC1 (CFG_IMMR+CFG_TSEC1_OFFSET)
 #define CFG_TSEC2_OFFSET 0x25000
-#define CFG_TSEC2 (CFG_IMMRBAR+CFG_TSEC2_OFFSET)
+#define CFG_TSEC2 (CFG_IMMR+CFG_TSEC2_OFFSET)
 
 /* USB */
 #define CFG_USE_MPC834XSYS_USB_PHY     1 /* Use SYS board PHY */
@@ -615,8 +642,8 @@
 #endif
 
 /* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */
-#define CFG_IBAT5L     (CFG_IMMRBAR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CFG_IBAT5U     (CFG_IMMRBAR | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT5L     (CFG_IMMR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT5U     (CFG_IMMR | BATU_BL_256M | BATU_VS | BATU_VP)
 
 /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
 #define CFG_IBAT6L     (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
@@ -666,11 +693,11 @@
 #define CONFIG_ETH1ADDR                00:E0:0C:00:7E:21
 #endif
 
-#define CONFIG_IPADDR          192.168.205.5
+#define CONFIG_IPADDR          192.168.1.253
 
 #define CONFIG_HOSTNAME                mpc8349emds
-#define CONFIG_ROOTPATH                /opt/eldk/ppc_6xx
-#define CONFIG_BOOTFILE                /tftpboot/tqm83xx/uImage
+#define CONFIG_ROOTPATH                /nfsroot/rootfs
+#define CONFIG_BOOTFILE                uImage
 
 #define CONFIG_SERVERIP                192.168.1.1
 #define CONFIG_GATEWAYIP       192.168.1.1
@@ -703,14 +730,31 @@
                "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
        "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"     \
                "bootm\0"                                               \
-       "rootpath=/opt/eldk/ppc_6xx\0"                                  \
-       "bootfile=/tftpboot/mpc8349emds/uImage\0"                       \
        "load=tftp 100000 /tftpboot/mpc8349emds/u-boot.bin\0"           \
        "update=protect off fe000000 fe03ffff; "                        \
                "era fe000000 fe03ffff; cp.b 100000 fe000000 ${filesize}\0"     \
        "upd=run load;run update\0"                                     \
+       "fdtaddr=400000\0"                                              \
+       "fdtfile=mpc8349emds.dtb\0"                                     \
        ""
 
+#define CONFIG_NFSBOOTCOMMAND                                          \
+   "setenv bootargs root=/dev/nfs rw "                                  \
+      "nfsroot=$serverip:$rootpath "                                    \
+      "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+      "console=$consoledev,$baudrate $othbootargs;"                     \
+   "tftp $loadaddr $bootfile;"                                          \
+   "tftp $fdtaddr $fdtfile;"                                           \
+   "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND                                          \
+   "setenv bootargs root=/dev/ram rw "                                  \
+      "console=$consoledev,$baudrate $othbootargs;"                     \
+   "tftp $ramdiskaddr $ramdiskfile;"                                    \
+   "tftp $loadaddr $bootfile;"                                          \
+   "tftp $fdtaddr $fdtfile;"                                           \
+   "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
 #define CONFIG_BOOTCOMMAND     "run flash_self"
 
 #endif /* __CONFIG_H */