MPC8544DS: Removes the unknown flash message information

[u-boot] / include / configs / MPC8544DS.h

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 545a76cc62154c1050dcd70db70bbcb3b24f936d..ffe9e0089d2239b7d1a6cac1e4ddd4b34efad6d9 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -42,6 +42,8 @@
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_FSL_PCIE_RESET  1       /* need PCIe reset errata */
 
+#define CONFIG_FSL_LAW         1       /* Use common FSL init code */
+
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
@@ -96,6 +98,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 #define CFG_PCI1_ADDR          (CFG_CCSRBAR+0x8000)
@@ -162,6 +165,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CFG_FLASH_BANKS_LIST   {0xfe800000,CFG_FLASH_BASE}
 
+#define CFG_FLASH_QUIET_TEST
 #define CFG_MAX_FLASH_BANKS    2               /* number of banks */
 #define CFG_MAX_FLASH_SECT     128             /* sectors per device */
 #undef CFG_FLASH_CHECKSUM
@@ -444,13 +448,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE                32768
-#define CFG_CACHELINE_SIZE     32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /*log base 2 of the above value*/
-#endif
-
 /*
  * Internal Definitions
  *