fsl_ddr: Move DDR config options to driver Kconfig

[u-boot] / include / configs / MPC8548CDS.h

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 789c62b138efc8b008947e9cc897a30e21d03911..84292b441eb287a519b4dc394c6268c50777b338 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -13,14 +13,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_DISPLAY_BOARDINFO
-
-/* High Level Configuration Options */
-#define CONFIG_BOOKE           1       /* BOOKE */
-#define CONFIG_E500            1       /* BOOKE e500 family */
-#define CONFIG_MPC8548         1       /* MPC8548 specific */
-#define CONFIG_MPC8548CDS      1       /* MPC8548CDS board specific */
-
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE   0xfff80000
 #endif
@@ -28,7 +20,6 @@
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1                   /* SRIO port 1 */
 
-#define CONFIG_PCI             /* enable any pci type devices */
 #define CONFIG_PCI1            /* PCI controller 1 */
 #define CONFIG_PCIE1           /* PCIE controller 1 (slot 1) */
 #undef CONFIG_PCI2
@@ -40,7 +31,6 @@
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_INTERRUPTS              /* enable pci, srio, ddr interrupts */
-#define CONFIG_FSL_LAW         1       /* Use common FSL init code */
 
 #define CONFIG_FSL_VIA
 
@@ -72,7 +62,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
@@ -406,9 +395,6 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 #if defined(CONFIG_PCI)
-
-#define CONFIG_PCI_PNP                 /* do pci plug-and-play */
-
 #undef CONFIG_EEPRO100
 #undef CONFIG_TULIP