AVR32: Enable networking

[u-boot] / include / configs / MPC8560ADS.h

diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index d58e6a7059cd67921ea91f521f2f85aca5f9d989..835bf5cb64e6a27613c396e044403031a6d4a9db 100644 (file)
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -38,18 +38,22 @@
 #define CONFIG_BOOKE           1       /* BOOKE */
 #define CONFIG_E500            1       /* BOOKE e500 family */
 #define CONFIG_MPC85xx         1       /* MPC8540/MPC8560 */
-#define CONFIG_MPC8560         1       /* MPC8560 specific */
+#define CONFIG_CPM2            1       /* has CPM2 */
 #define CONFIG_MPC8560ADS      1       /* MPC8560ADS board specific */
 
 #define CONFIG_PCI
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
+#undef CONFIG_TSEC_ENET                /* tsec ethernet support */
 #undef  CONFIG_ETHER_ON_FCC             /* cpm FCC ethernet support */
+#define  CONFIG_ETHER_ON_FCC             /* cpm FCC ethernet support */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
-#define CONFIG_DDR_ECC                 /* only for ECC DDR module */
 #define CONFIG_DDR_DLL                 /* possible DLL fix needed */
 #define CONFIG_DDR_2T_TIMING           /* Sets the 2T timing bit */
 
+#define CONFIG_DDR_ECC                 /* only for ECC DDR module */
+#define CONFIG_MEM_INIT_VALUE          0xDeadBeef
+
 
 /*
  * sysclk for MPC85xx
@@ -267,7 +271,7 @@
 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET
 
-#define CFG_MONITOR_LEN                (512 * 1024)    /* Reserve 256 kB for Mon */
+#define CFG_MONITOR_LEN                (256 * 1024)    /* Reserve 256 kB for Mon */
 #define CFG_MALLOC_LEN         (128 * 1024)    /* Reserved for malloc */
 
 /* Serial Port */
@@ -286,12 +290,28 @@
 #define CFG_PROMPT_HUSH_PS2 "> "
 #endif
 
-/* I2C */
-#define  CONFIG_HARD_I2C               /* I2C with hardware support*/
+/* pass open firmware flat tree */
+#define CONFIG_OF_FLAT_TREE    1
+#define CONFIG_OF_BOARD_SETUP  1
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE  8192
+
+#define OF_CPU                 "PowerPC,8560@0"
+#define OF_SOC                 "soc8560@e0000000"
+#define OF_TBCLK               (bd->bi_busfreq / 8)
+#define OF_STDOUT_PATH         "/soc8560@e0000000/serial@4500"
+
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C                /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_SLAVE          0x7F
 #define CFG_I2C_NOPROBES        {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
 
 /* RapidIO MMU */
 #define CFG_RIO_MEM_BASE       0xc0000000      /* base address */
@@ -337,13 +357,17 @@
 
 #define CONFIG_MII             1       /* MII PHY management */
 #define CONFIG_MPC85XX_TSEC1   1
+#define CONFIG_MPC85XX_TSEC1_NAME      "TSEC0"
 #define CONFIG_MPC85XX_TSEC2   1
+#define CONFIG_MPC85XX_TSEC2_NAME      "TSEC1"
 #undef CONFIG_MPC85XX_FEC
 #define TSEC1_PHY_ADDR         0
 #define TSEC2_PHY_ADDR         1
 #define TSEC1_PHYIDX           0
 #define TSEC2_PHYIDX           0
-#define CONFIG_ETHPRIME                "MOTO ENET0"
+
+/* Options are: TSEC[0-1] */
+#define CONFIG_ETHPRIME                "TSEC0"
 
 #elif defined(CONFIG_ETHER_ON_FCC)     /* CPM FCC Ethernet */