]> git.sur5r.net Git - u-boot/blobdiff - include/configs/MPC8568MDS.h
ARM: rmobile: salvator-x: Adjust UART clock
[u-boot] / include / configs / MPC8568MDS.h
index 3cddb5fb83a7f92da53e2b5f61e8c018e124b1d7..0bc71d4ae62464b6cd7ced9bb36120cbacda5066 100644 (file)
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/* High Level Configuration Options */
-#define CONFIG_BOOKE           1       /* BOOKE */
-#define CONFIG_E500            1       /* BOOKE e500 family */
-
 #define        CONFIG_SYS_TEXT_BASE    0xfff80000
 
 #define CONFIG_SYS_SRIO
@@ -45,8 +41,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CONFIG_ENABLE_36BIT_PHYS       1
 
-#define CONFIG_BOARD_EARLY_INIT_F      1       /* Call board_pre_init */
-
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END         0x00400000
 
@@ -54,7 +48,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
@@ -65,7 +58,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000      /* DDR is system memory*/
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_NUM_DDR_CONTROLLERS     1
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
@@ -426,8 +418,6 @@ extern unsigned long get_clock_freq(void);
 
 #undef  CONFIG_BOOTARGS           /* the boot command will set bootargs*/
 
-#define CONFIG_BAUDRATE        115200
-
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
    "netdev=eth0\0"                                                      \
    "consoledev=ttyS0\0"                                                 \