OMAP3: Fix timer handling to 1ms and CONFIG_SYS_HZ to 1000

[u-boot] / include / configs / MPC8572DS.h

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index a2360d8708f109afbc90e0c422259eea18f5e082..b60b3641f4873f1082f54ea8c44eed1f0bc9e12c 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -404,10 +404,11 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 /* controller 3, direct to uli, tgtid 3, Base address 8000 */
 #define CONFIG_SYS_PCIE3_MEM_VIRT      0x80000000
-#define CONFIG_SYS_PCIE3_MEM_BUS       0x80000000
 #ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_PCIE3_MEM_BUS       0xc0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0xc00000000ull
 #else
+#define CONFIG_SYS_PCIE3_MEM_BUS       0x80000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0x80000000
 #endif
 #define CONFIG_SYS_PCIE3_MEM_SIZE      0x20000000      /* 512M */
@@ -422,10 +423,11 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 /* controller 2, Slot 2, tgtid 2, Base address 9000 */
 #define CONFIG_SYS_PCIE2_MEM_VIRT      0xa0000000
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xa0000000
 #ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_PCIE2_MEM_BUS       0xc0000000
 #define CONFIG_SYS_PCIE2_MEM_PHYS      0xc20000000ull
 #else
+#define CONFIG_SYS_PCIE2_MEM_BUS       0xa0000000
 #define CONFIG_SYS_PCIE2_MEM_PHYS      0xa0000000
 #endif
 #define CONFIG_SYS_PCIE2_MEM_SIZE      0x20000000      /* 512M */
@@ -440,10 +442,11 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 /* controller 1, Slot 1, tgtid 1, Base address a000 */
 #define CONFIG_SYS_PCIE1_MEM_VIRT      0xc0000000
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xc0000000
 #ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_PCIE1_MEM_BUS       0xc0000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS      0xc40000000ull
 #else
+#define CONFIG_SYS_PCIE1_MEM_BUS       0xc0000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS      0xc0000000
 #endif
 #define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */