DaVinci DM6467: Enhance board Support

[u-boot] / include / configs / MPC8610HPCD.h

diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 645d947a5da646b92ac0dde8f8d323f26f28e33e..03ee394b3988ffb5da842a1fdbfcfc86f50716d1 100644 (file)
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007 Freescale Semiconductor, Inc.
+ * Copyright 2007, 2010 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -19,6 +19,8 @@
 #define CONFIG_MPC8610HPCD     1       /* MPC8610HPCD board specific */
 #define CONFIG_LINUX_RESET_VEC 0x100   /* Reset vector used by Linux */
 
+#define        CONFIG_SYS_TEXT_BASE    0xfff00000
+
 #define CONFIG_FSL_DIU_FB      1       /* FSL DIU */
 
 /* video */
@@ -53,6 +55,7 @@
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_INTERRUPTS              /* enable pci, srio, ddr interrupts */
 
+#define CONFIG_BAT_RW          1       /* Use common BAT rw code */
 #define CONFIG_HIGH_BATS       1       /* High BATs supported & enabled */
 #define CONFIG_ALTIVEC         1
 
@@ -184,7 +187,7 @@
 #undef CONFIG_SYS_FLASH_CHECKSUM
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE       /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
 #define CONFIG_SYS_MONITOR_BASE_EARLY   0xfff00000     /* early monitor loc */
 
 #define CONFIG_FLASH_CFI_DRIVER
@@ -210,10 +213,9 @@
 #else
 #define CONFIG_SYS_INIT_RAM_ADDR       0xe4000000      /* Initial RAM address */
 #endif
-#define CONFIG_SYS_INIT_RAM_END        0x4000          /* End of used area in RAM */
+#define CONFIG_SYS_INIT_RAM_SIZE       0x4000          /* Size of used area in RAM */
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128             /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN         (512 * 1024)    /* Reserve 512 KB for Mon */
@@ -274,6 +276,7 @@
 #define CONFIG_SYS_PCI1_IO_SIZE        0x00100000      /* 1M */
 
 /* controller 1, Base address 0xa000 */
+#define CONFIG_SYS_PCIE1_NAME          "ULI"
 #define CONFIG_SYS_PCIE1_MEM_BUS       0xa0000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS      CONFIG_SYS_PCIE1_MEM_BUS
 #define CONFIG_SYS_PCIE1_MEM_SIZE      0x10000000      /* 256M */
@@ -282,6 +285,7 @@
 #define CONFIG_SYS_PCIE1_IO_SIZE       0x00100000      /* 1M */
 
 /* controller 2, Base Address 0x9000 */
+#define CONFIG_SYS_PCIE2_NAME          "Slot 1"
 #define CONFIG_SYS_PCIE2_MEM_BUS       0x90000000
 #define CONFIG_SYS_PCIE2_MEM_PHYS      CONFIG_SYS_PCIE2_MEM_BUS
 #define CONFIG_SYS_PCIE2_MEM_SIZE      0x10000000      /* 256M */
@@ -423,7 +427,7 @@
 /* Map the last 1M of flash where we're running from reset */
 #define CONFIG_SYS_DBAT6L_EARLY        (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
                                 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U_EARLY        (TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_DBAT6U_EARLY        (CONFIG_SYS_TEXT_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
 #define CONFIG_SYS_IBAT6L_EARLY        (CONFIG_SYS_MONITOR_BASE_EARLY | BATL_PP_RW \
                                 | BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT6U_EARLY        CONFIG_SYS_DBAT6U_EARLY
@@ -519,14 +523,6 @@
  */
 #define CONFIG_SYS_BOOTMAPSZ   (8 << 20)       /* Initial Memory map for Linux*/
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM  0x02            /* Software reboot */
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
@@ -605,11 +601,11 @@
  "netdev=eth0\0"                                               \
  "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0"                                \
  "tftpflash=tftpboot $loadaddr $uboot; "                       \
-       "protect off " MK_STR(TEXT_BASE) " +$filesize; "        \
-       "erase " MK_STR(TEXT_BASE) " +$filesize; "              \
-       "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; "      \
-       "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
-       "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0"     \
+       "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "     \
+       "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "           \
+       "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; "   \
+       "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "      \
+       "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0"  \
  "consoledev=ttyS0\0"                                          \
  "ramdiskaddr=2000000\0"                                       \
  "ramdiskfile=8610hpcd/ramdisk.uboot\0"                                \