]> git.sur5r.net Git - u-boot/blobdiff - include/configs/MVBLM7.h
tegra: ventana: add own device tree, enable USB
[u-boot] / include / configs / MVBLM7.h
index 32cc9295f5e7cbd02673137ad0f0ebaa62c8b819..9b458c33f916095ae6def48495de837e95e9c51f 100644 (file)
 #define CONFIG_SYS_MEMTEST_END         (70<<20)
 #define CONFIG_VERY_BIG_RAM
 
-#define CONFIG_SYS_DDRCDR              0x22000001
+#define CONFIG_SYS_DDRCDR              (DDRCDR_PZ_HIZ \
+                                       | DDRCDR_NZ_HIZ \
+                                       | DDRCDR_Q_DRN)
+                                       /* 0x22000001 */
 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL  DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
 
 #define CONFIG_SYS_DDR_SIZE            512
 
 #define CONFIG_SYS_FLASH_BASE          0xFF800000
 #define CONFIG_SYS_FLASH_SIZE          8
-#define CONFIG_SYS_FLASH_SIZE_SHIFT    3
 #define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500
 #define CONFIG_SYS_MAX_FLASH_BANKS     1
 #define CONFIG_SYS_MAX_FLASH_SECT      256
 
-#define CONFIG_SYS_BR0_PRELIM  (CONFIG_SYS_FLASH_BASE | BR_PS_16 | BR_V)
-#define CONFIG_SYS_OR0_PRELIM  ((~(CONFIG_SYS_FLASH_SIZE - 1) << 20) \
+#define CONFIG_SYS_BR0_PRELIM  (CONFIG_SYS_FLASH_BASE \
+                               | BR_PS_16 \
+                               | BR_MS_GPCM \
+                               | BR_V)
+#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
                                | OR_GPCM_XACS \
                                | OR_GPCM_SCY_15 \
-                               | OR_GPCM_TRLX \
-                               | OR_GPCM_EHTR \
+                               | OR_GPCM_TRLX_SET \
+                               | OR_GPCM_EHTR_SET \
                                | OR_GPCM_EAD)
 #define CONFIG_SYS_LBLAWBAR0_PRELIM    CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_LBLAWAR0_PRELIM     (LBLAWAR_EN \
-                               | (0x13 + CONFIG_SYS_FLASH_SIZE_SHIFT))
+#define CONFIG_SYS_LBLAWAR0_PRELIM     (LBLAWAR_EN | LBLAWAR_8MB)
 
 /*
  * U-Boot memory configuration
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_AUTO_COMPLETE   /* add autocompletion support   */
 #define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 
 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000