]> git.sur5r.net Git - u-boot/blobdiff - include/configs/P1010RDB.h
Move CONFIG_PANIC_HANG to Kconfig
[u-boot] / include / configs / P1010RDB.h
index 13edd0ac9c05b16f34e7292024e3de0fbb5bdf60..6a444aea61a55f718d38f36bf6c160757ce7dffe 100644 (file)
 #define CONFIG_L2_CACHE                        /* toggle L2 cache */
 #define CONFIG_BTB                     /* toggle branch predition */
 
-#define CONFIG_ADDR_STREAMING          /* toggle addr streaming */
 
 #define CONFIG_ENABLE_36BIT_PHYS
 
 
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END         0x1fffffff
-#define CONFIG_PANIC_HANG              /* do not reset board on panic */
 
 /* DDR Setup */
 #define CONFIG_SYS_DDR_RAW_TIMING
@@ -352,9 +350,6 @@ extern unsigned long get_sdram_size(void);
 
 #define CONFIG_MTD_DEVICE
 #define CONFIG_MTD_PARTITION
-#define MTDIDS_DEFAULT                 "nand0=ff800000.flash"
-#define MTDPARTS_DEFAULT               \
-       "mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
 
 #define CONFIG_SYS_NAND_CSPR   (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
                                | CSPR_PORT_SIZE_8      \
@@ -638,9 +633,7 @@ extern unsigned long get_sdram_size(void);
 #endif /* CONFIG_TSEC_ENET */
 
 /* SATA */
-#define CONFIG_FSL_SATA
 #define CONFIG_FSL_SATA_V2
-#define CONFIG_LIBATA
 
 #ifdef CONFIG_FSL_SATA
 #define CONFIG_SYS_SATA_MAX_DEVICE     2