arm/km: disable ls (through jffs2 support)

[u-boot] / include / configs / P1_P2_RDB.h

diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 4103e8b96bfc0320fa49073a24fe0ea2da3662bf..59f975546c0ab93f43a4fbb1e3af4ae7aa359a5a 100644 (file)
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -244,6 +244,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
 
 #define CONFIG_BOARD_EARLY_INIT_R      /* call board_early_init_r function */
+#define CONFIG_MISC_INIT_R
 #define CONFIG_HWCONFIG
 
 #define CONFIG_SYS_INIT_RAM_LOCK       1
@@ -303,13 +304,13 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP                ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
 
 /* NAND flash config */
-#define CONFIG_NAND_BR_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
+#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
                                | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
                                | BR_PS_8       /* Port Size = 8 bit */ \
                                | BR_MS_FCM             /* MSEL = FCM */ \
                                | BR_V)                 /* valid */
 
-#define CONFIG_NAND_OR_PRELIM  (0xFFF80000             /* length 32K */ \
+#define CONFIG_SYS_NAND_OR_PRELIM      (0xFFF80000     /* length 32K */ \
                                | OR_FCM_CSCT \
                                | OR_FCM_CST \
                                | OR_FCM_CHT \
@@ -318,15 +319,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
                                | OR_FCM_EHTR)
 
 #ifdef CONFIG_RAMBOOT_NAND
-#define CONFIG_SYS_BR0_PRELIM  CONFIG_NAND_BR_PRELIM  /* NAND Base Address */
-#define CONFIG_SYS_OR0_PRELIM  CONFIG_NAND_OR_PRELIM  /* NAND Options */
+#define CONFIG_SYS_BR0_PRELIM  CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
+#define CONFIG_SYS_OR0_PRELIM  CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 #define CONFIG_SYS_BR1_PRELIM  CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 #define CONFIG_SYS_OR1_PRELIM  CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 #else
 #define CONFIG_SYS_BR0_PRELIM  CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 #define CONFIG_SYS_OR0_PRELIM  CONFIG_FLASH_OR_PRELIM  /* NOR Options */
-#define CONFIG_SYS_BR1_PRELIM  CONFIG_NAND_BR_PRELIM  /* NAND Base Address */
-#define CONFIG_SYS_OR1_PRELIM  CONFIG_NAND_OR_PRELIM  /* NAND Options */
+#define CONFIG_SYS_BR1_PRELIM  CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
+#define CONFIG_SYS_OR1_PRELIM  CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 #endif
 
 #define CONFIG_SYS_VSC7385_BASE        0xffb00000
@@ -410,6 +411,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_RTC_DS1337
 #define CONFIG_SYS_RTC_DS1337_NOOSC
 #define CONFIG_SYS_I2C_RTC_ADDR                0x68
+
+/* eSPI - Enhanced SPI */
+#define CONFIG_FSL_ESPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_CMD_SF
+#define CONFIG_SF_DEFAULT_SPEED                10000000
+#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
+
 /*
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
@@ -521,9 +531,18 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
        #define CONFIG_ENV_IS_IN_NAND   1
        #define CONFIG_ENV_SIZE         CONFIG_SYS_NAND_BLOCK_SIZE
        #define CONFIG_ENV_OFFSET       ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
-#elif defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
-       #define CONFIG_ENV_IS_NOWHERE   1       /* Store ENV in memory only */
-       #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
+#elif defined(CONFIG_RAMBOOT_SDCARD)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_SIZE                        0x2000
+#define CONFIG_SYS_MMC_ENV_DEV         0
+#elif defined(CONFIG_RAMBOOT_SPIFLASH)
+       #define CONFIG_ENV_IS_IN_SPI_FLASH
+       #define CONFIG_ENV_SPI_BUS      0
+       #define CONFIG_ENV_SPI_CS       0
+       #define CONFIG_ENV_SPI_MAX_HZ   10000000
+       #define CONFIG_ENV_SPI_MODE     0
+       #define CONFIG_ENV_OFFSET       0x100000        /* 1MB */
+       #define CONFIG_ENV_SECT_SIZE    0x10000
        #define CONFIG_ENV_SIZE         0x2000
 #endif
 #else
@@ -611,11 +630,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 /*
  * For booting Linux, the board info and command line data
- * have to be in the first 16 MB of memory, since this is
+ * have to be in the first 64 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization.
  */
-#define CONFIG_SYS_BOOTMAPSZ   (16 << 20)/* Initial Memory map for Linux*/
-#define CONFIG_SYS_BOOTM_LEN   (16 << 20)      /* Increase max gunzip size */
+#define CONFIG_SYS_BOOTMAPSZ   (64 << 20)/* Initial Memory map for Linux*/
+#define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */