microblaze: Enable TFTP put command

[u-boot] / include / configs / P2041RDB.h

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index c35d76307d6cd96b85655f1bf136e8a902a21ccb..da98f8f027481cda6336239580031c2df693ff31 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -66,6 +66,7 @@
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1                   /* SRIO port 1 */
 #define CONFIG_SRIO2                   /* SRIO port 2 */
+#define CONFIG_SYS_DPAA_RMAN           /* RMan */
 
 #define CONFIG_FSL_LAW                 /* Use common FSL init code */
 
@@ -91,6 +92,7 @@
 #elif defined(CONFIG_SDCARD)
        #define CONFIG_SYS_EXTRA_ENV_RELOC
        #define CONFIG_ENV_IS_IN_MMC
+       #define CONFIG_FSL_FIXED_MMC_LOCATION
        #define CONFIG_SYS_MMC_ENV_DEV          0
        #define CONFIG_ENV_SIZE                 0x2000
        #define CONFIG_ENV_OFFSET               (512 * 1097)
@@ -102,7 +104,10 @@
        #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 #endif
 
-#define CONFIG_SYS_CLK_FREQ    66666666
+#ifndef __ASSEMBLY__
+unsigned long get_board_sys_clk(unsigned long dummy);
+#endif
+#define CONFIG_SYS_CLK_FREQ    get_board_sys_clk(0)
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
@@ -138,20 +143,6 @@
 #define CONFIG_SYS_L3_SIZE             (1024 << 10)
 #define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE)
 
-/*
- * Base addresses -- Note these are effective addresses where the
- * actual resources get mapped (not physical addresses)
- */
-#define CONFIG_SYS_CCSRBAR_DEFAULT     0xfe000000      /* CCSRBAR Default */
-#define CONFIG_SYS_CCSRBAR             0xfe000000      /* relocated CCSRBAR */
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_CCSRBAR_PHYS                0xffe000000ull
-#else
-#define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR
-#endif
-/* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR
-
 #ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_DCSRBAR             0xf0000000
 #define CONFIG_SYS_DCSRBAR_PHYS                0xf00000000ull
@@ -419,34 +410,39 @@
 #define CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_DPAA_PME
 /* Default address of microcode for the Linux Fman driver */
-#define CONFIG_SYS_FMAN_FW
 #if defined(CONFIG_SPIFLASH)
 /*
  * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
  * env, so we got 0x110000.
  */
-#define CONFIG_SYS_QE_FW_IN_SPIFLASH   0x110000
+#define CONFIG_SYS_QE_FW_IN_SPIFLASH
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
  * about 545KB (1089 blocks), Env is stored after the image, and the env size is
  * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
  */
-#define CONFIG_SYS_QE_FW_IN_MMC                (512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_IN_MMC
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     (512 * 1130)
 #elif defined(CONFIG_NAND)
-#define CONFIG_SYS_QE_FW_IN_NAND       (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
-#define CONFIG_SYS_FMAN_FW_ADDR                0xEF000000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0xEF000000
 #endif
-#define CONFIG_SYS_FMAN_FW_LENGTH      0x10000
-#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_FMAN_FW_LENGTH)
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
+#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
+#define CONFIG_PHYLIB_10G
+#define CONFIG_PHY_VITESSE
+#define CONFIG_PHY_TERANETICS
 #endif
 
 #ifdef CONFIG_PCI
-#define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 #define CONFIG_E1000
 
@@ -454,6 +450,25 @@
 #define CONFIG_DOS_PARTITION
 #endif /* CONFIG_PCI */
 
+/* SATA */
+#define CONFIG_FSL_SATA
+#ifdef CONFIG_FSL_SATA
+#define CONFIG_LIBATA
+
+#define CONFIG_SYS_SATA_MAX_DEVICE     2
+#define CONFIG_SATA1
+#define CONFIG_SYS_SATA1               CONFIG_SYS_MPC85xx_SATA1_ADDR
+#define CONFIG_SYS_SATA1_FLAGS         FLAGS_DMA
+#define CONFIG_SATA2
+#define CONFIG_SYS_SATA2               CONFIG_SYS_MPC85xx_SATA2_ADDR
+#define CONFIG_SYS_SATA2_FLAGS         FLAGS_DMA
+
+#define CONFIG_LBA48
+#define CONFIG_CMD_SATA
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT2
+#endif
+
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2
 #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3
@@ -466,6 +481,8 @@
 #define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR   0x1e
 #define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR   0x1f
 
+#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0
+
 #define CONFIG_SYS_TBIPA_VALUE 8
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC1"
@@ -558,8 +575,8 @@
 /*
  * Environment Configuration
  */
-#define CONFIG_ROOTPATH                /opt/nfsroot
-#define CONFIG_BOOTFILE                uImage
+#define CONFIG_ROOTPATH                "/opt/nfsroot"
+#define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_UBOOTPATH       u-boot.bin
 
 /* default location for tftp and bootm */