]> git.sur5r.net Git - u-boot/blobdiff - include/configs/SIMPC8313.h
DaVinci DM6467: Enhance board Support
[u-boot] / include / configs / SIMPC8313.h
index 03482972db4e04e1ca70f998807c31f1c43431ae..339e02b5ee365055b68926f3eae5b53a2c5c07f2 100644 (file)
 #define CONFIG_MPC831x                 1
 #define CONFIG_MPC8313                 1
 
-#ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE   0x00100000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE    (512 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST     0x00100000
+#define CONFIG_SYS_NAND_U_BOOT_START   0x00100100
+#define CONFIG_SYS_NAND_U_BOOT_RELOC   0x00010000
+#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
+
+#define CONFIG_SYS_TEXT_BASE   0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */
+#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
+
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
+#else
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
 #endif
 
 #define CONFIG_PCI
  */
 #define CONFIG_SYS_NO_FLASH
 
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
-
 #if !defined(CONFIG_NAND_SPL)
 #define CONFIG_SYS_RAMBOOT
 #endif
 #define CONFIG_SYS_INIT_RAM_ADDR       0xFD000000      /* Initial RAM address */
 #define CONFIG_SYS_INIT_RAM_SIZE               0x1000          /* Size of used area in RAM*/
 
-#define CONFIG_SYS_GBL_DATA_SIZE       0x100           /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
 #define CONFIG_CMD_NAND                1
 #define CONFIG_NAND_FSL_ELBC           1
 
-#define CONFIG_SYS_NAND_U_BOOT_SIZE    (512 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST     0x00100000
-#define CONFIG_SYS_NAND_U_BOOT_START   0x00100100
-#define CONFIG_SYS_NAND_U_BOOT_RELOC   0x00010000
-#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
-
 #define CONFIG_SYS_NAND_BR_PRELIM      ( CONFIG_SYS_NAND_BASE \
                                        | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
                                        | BR_PS_8               /* Port Size = 8 bit */ \