]> git.sur5r.net Git - u-boot/blobdiff - include/configs/T1040QDS.h
ARM: versatile: pass console setting to the kernel
[u-boot] / include / configs / T1040QDS.h
index 2738242c549a6ab5754c5e7b3bcb7c6b86668b18..7d0bc043f99b4f77912d886150e33000732c60a5 100644 (file)
@@ -32,6 +32,8 @@
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_RAMBOOT_TEXT_BASE       CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS    0xfffffffc
+#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/t1040qds/t1040_pbi.cfg
+#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/t1040qds/t1040_rcw.cfg
 #endif
 
 /* High Level Configuration Options */
@@ -168,7 +170,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
@@ -231,6 +233,7 @@ unsigned long get_board_ddr_clk(void);
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE   0x20
 #define QIXIS_RCFG_CTL_RECONFIG_START  0x21
 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE  0x08
+#define        QIXIS_RST_FORCE_MEM             0x01
 
 #define CONFIG_SYS_CSPR3_EXT   (0xf)
 #define CONFIG_SYS_CSPR3       (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
@@ -246,7 +249,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_CS3_FTIM1           (FTIM1_GPCM_TACO(0xff) | \
                                        FTIM1_GPCM_TRAD(0x3f))
 #define CONFIG_SYS_CS3_FTIM2           (FTIM2_GPCM_TCS(0x0e) | \
-                                       FTIM2_GPCM_TCH(0x0) | \
+                                       FTIM2_GPCM_TCH(0x8) | \
                                        FTIM2_GPCM_TWP(0x1f))
 #define CONFIG_SYS_CS3_FTIM3           0x0
 
@@ -680,7 +683,6 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_CMD_KGDB
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
 
 /*