]> git.sur5r.net Git - u-boot/blobdiff - include/configs/T4240RDB.h
keymile/powerpc: move to the architecture-generic board system
[u-boot] / include / configs / T4240RDB.h
index 13f4bd3c539fae5629ec1adc374f875ec0417bdc..e639e1d57af0f5c88e15b948785593ecb33f1747 100644 (file)
@@ -514,6 +514,29 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NOR_FTIM2
 #define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NOR_FTIM3
 
+/* CPLD on IFC */
+#define CONFIG_SYS_CPLD_BASE   0xffdf0000
+#define CONFIG_SYS_CPLD_BASE_PHYS      (0xf00000000ull | CONFIG_SYS_CPLD_BASE)
+#define CONFIG_SYS_CSPR3_EXT   (0xf)
+#define CONFIG_SYS_CSPR3       (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \
+                               | CSPR_PORT_SIZE_8 \
+                               | CSPR_MSEL_GPCM \
+                               | CSPR_V)
+
+#define CONFIG_SYS_AMASK3      IFC_AMASK(4*1024)
+#define CONFIG_SYS_CSOR3       0x0
+
+/* CPLD Timing parameters for IFC CS3 */
+#define CONFIG_SYS_CS3_FTIM0           (FTIM0_GPCM_TACSE(0x0e) | \
+                                       FTIM0_GPCM_TEADC(0x0e) | \
+                                       FTIM0_GPCM_TEAHC(0x0e))
+#define CONFIG_SYS_CS3_FTIM1           (FTIM1_GPCM_TACO(0x0e) | \
+                                       FTIM1_GPCM_TRAD(0x1f))
+#define CONFIG_SYS_CS3_FTIM2           (FTIM2_GPCM_TCS(0x0e) | \
+                                       FTIM2_GPCM_TCH(0x0) | \
+                                       FTIM2_GPCM_TWP(0x1f))
+#define CONFIG_SYS_CS3_FTIM3           0x0
+
 #if defined(CONFIG_RAMBOOT_PBL)
 #define CONFIG_SYS_RAMBOOT
 #endif