mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields

[u-boot] / include / configs / TQM834x.h

diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 541a27b49a7f58976cb9e7114577ffea5ffc621e..4c909e61ad0cb1010c6fef9c7cdfce3f179d17d2 100644 (file)
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -52,7 +52,8 @@
  * External Local Bus rate is
  *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR                (LCRR_DBYP | LCRR_CLKDIV_8)
+#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
 
 /* board pre init: do not call, nothing to do */
 #undef CONFIG_BOARD_EARLY_INIT_F
@@ -247,11 +248,10 @@ extern int tqm834x_num_flash_banks;
 #if defined(CONFIG_PCI)
 
 #define CONFIG_PCI_PNP                  /* do pci plug-and-play */
-#define CONFIG_83XX_GENERIC_PCI
 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup */
 
 /* PCI1 host bridge */
-#define CONFIG_SYS_PCI1_MEM_BASE       0x80000000
+#define CONFIG_SYS_PCI1_MEM_BASE       0x90000000
 #define CONFIG_SYS_PCI1_MEM_PHYS       CONFIG_SYS_PCI1_MEM_BASE
 #define CONFIG_SYS_PCI1_MEM_SIZE       0x10000000      /* 256M */
 #define CONFIG_SYS_PCI1_MMIO_BASE      (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE)