]> git.sur5r.net Git - u-boot/blobdiff - include/configs/acadia.h
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
[u-boot] / include / configs / acadia.h
index 39f85ae3b657a8af0cc68fde730e13f61b5221b9..8c447ca951a00ac5c47c94adcedeb311c476a88a 100644 (file)
 #define CONFIG_4xx             1               /* ... PPC4xx family    */
 #define CONFIG_405EZ           1               /* Specifc 405EZ support*/
 
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE   0xFFF80000
+#endif
+
 /*
  * Include common defines/options for all AMCC eval boards
  */
 #define CONFIG_SYS_OCM_DATA_ADDR       0xf8000000
 #define CONFIG_SYS_OCM_DATA_SIZE       0x4000                  /* 16K of onchip SRAM           */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR        /* inside of SRAM               */
-#define CONFIG_SYS_INIT_RAM_END        CONFIG_SYS_OCM_DATA_SIZE        /* End of used area in RAM      */
+#define CONFIG_SYS_INIT_RAM_SIZE       CONFIG_SYS_OCM_DATA_SIZE        /* Size of used area in RAM     */
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128                     /* size for initial data        */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
 
 #define CONFIG_SYS_NAND_ECCSIZE        256
 #define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_ECCSTEPS       (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
 #define CONFIG_SYS_NAND_OOBSIZE        16
-#define CONFIG_SYS_NAND_ECCTOTAL       (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
 #define CONFIG_SYS_NAND_ECCPOS         {0, 1, 2, 3, 6, 7}
 
 #ifdef CONFIG_ENV_IS_IN_NAND