fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo features

[u-boot] / include / configs / alpr.h

diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index 315841257dc6d1e708d9bada82992c006c1e9a3c..ee0c14d96038e0108aa8bc790c9ada2506af7a1e 100644 (file)
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -118,6 +118,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C                1       /* I2C with hardware support    */
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged               */
+#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
 #define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address  */
 #define CONFIG_SYS_I2C_SLAVE           0x7F
 #define CONFIG_SYS_I2C_NOPROBES        {0x69}  /* Don't probe these addrs      */
@@ -198,6 +199,7 @@
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
 
+#define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_NET_MULTI       1
 #define CONFIG_PHY_ADDR                0x02    /* dummy setting, no EMAC0 used */
@@ -230,22 +232,17 @@
  */
 #include <config_cmd_default.h>
 
-#define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
 #define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ELF
 #define CONFIG_CMD_FPGA
 #define CONFIG_CMD_I2C
-#define CONFIG_CMD_IRQ
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NAND
 #define CONFIG_CMD_NET
-#define CONFIG_CMD_NFS
+#undef CONFIG_CMD_NFS
 #define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_REGINFO
-
 
 #undef CONFIG_WATCHDOG                 /* watchdog disabled            */
 
@@ -337,7 +334,6 @@
  * NAND-FLASH stuff
  *-----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE     4
-#define NAND_MAX_CHIPS         CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_BASE           0xF0000000      /* NAND FLASH Base Address      */
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE + 0, CONFIG_SYS_NAND_BASE + 2,   \
                                  CONFIG_SYS_NAND_BASE + 4, CONFIG_SYS_NAND_BASE + 6 }