TI: Rework SRAM definitions and maximums

[u-boot] / include / configs / am3517_crane.h

diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index a65d1a884b0150c6b6bc3fec43c630985a7e56c5..56a63b4944a401efb53a6121cc870ced79e4585b 100644 (file)
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -13,8 +13,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_CACHELINE_SIZE      64
-
 /*
  * High Level Configuration Options
  */
@@ -279,7 +277,8 @@
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_TEXT_BASE           0x40200800
-#define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000         /* 512 KB */