ti_omap4_common.h: Switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIAL

[u-boot] / include / configs / aristainetos-common.h

diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index 30d903e7a65eff4867c4f3d3a351636ecf8e6060..f03297e137762199fcdddb85683748266b5197f4 100644 (file)
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -45,7 +45,6 @@
 #define CONFIG_SPI_FLASH_MTD
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_MXC_SPI
-#define CONFIG_SF_DEFAULT_BUS          3
 #define CONFIG_SF_DEFAULT_SPEED                20000000
 #define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
@@ -106,9 +105,6 @@
        "ubiboot=echo Booting from ubi ...; " \
                "run ubiargs addmtd addmisc set_fit_default;" \
                "bootm ${fit_addr_r}\0" \
-       "ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \
-               "ubifsload ${fit_addr_r} /boot/system.itb; " \
-               "imi ${fit_addr_r}\0 " \
        "rescueargs=setenv bootargs console=${console},${baudrate} " \
                "root=/dev/ram rw\0 " \
        "rescueboot=echo Booting rescue system from NOR ...; " \
@@ -193,6 +189,8 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           0x7f