]> git.sur5r.net Git - u-boot/blobdiff - include/configs/at91rm9200ek.h
OMAP3: Add support for DPLL5 (usbhost)
[u-boot] / include / configs / at91rm9200ek.h
index 6b2dd63b47dcbb7673c396eec7a3878468d2dc22..810023a49449b2203b1c0ff1cc0119f0be7f7963 100644 (file)
 
 #include <asm/sizes.h>
 
+/*
+ * set some initial configurations depending on configure target
+ *
+ * at91rm9200ek_config     -> boot from 0x0 in NOR Flash at CS0
+ * at91rm9200ek_ram_config -> continue booting from 0x20100000 in RAM; lowlevel
+ *                            initialisation was done by some preloader
+ */
+#ifdef CONFIG_RAMBOOT
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_TEXT_BASE 0x20100000
+#else
+#define CONFIG_SYS_TEXT_BASE 0x10000000
+#endif
+
 /*
  * AT91C_XTAL_CLOCK is the frequency of external xtal in hertz
  * AT91C_MAIN_CLOCK is the frequency of PLLA output
@@ -57,6 +71,8 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 
+#define CONFIG_AT91FAMILY
+
 /*
  * Memory Configuration
  */
 #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
 #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */
 #define CONFIG_SYS_SDRAM       CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */
-#define CONFIG_SYS_SDRAM1      CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */
+#define CONFIG_SYS_SDRAM1      (CONFIG_SYS_SDRAM_BASE+0x80)
 #define CONFIG_SYS_SDRAM_VAL   0x00000000 /* value written to CONFIG_SYS_SDRAM */
 #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
 #define CONFIG_SYS_SDRC_MR_VAL1        0x00000004 /* refresh */
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
 #undef CONFIG_CMD_FPGA
 
 /*
 #define CONFIG_SYS_MAX_FLASH_SECT      256
 #define CONFIG_SYS_FLASH_PROTECTION
 
+/*
+ * USB Config
+ */
+#define CONFIG_USB_ATMEL                       1
+#define CONFIG_USB_OHCI_NEW                    1
+#define CONFIG_USB_KEYBOARD                    1
+#define CONFIG_USB_STORAGE                     1
+#define CONFIG_DOS_PARTITION                   1
+
+#define CONFIG_SYS_USB_OHCI_CPU_INIT           1
+#define CONFIG_SYS_USB_OHCI_REGS_BASE          AT91_USB_HOST_BASE
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME          "at91rm9200"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     15
+
 /*
  * Environment Settings
  */
 #define CONFIG_SYS_MALLOC_LEN          ROUND(3 * CONFIG_ENV_SIZE + SZ_128K, \
                                             SZ_4K)
 /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE       128
 
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + SZ_4K \
-                                       - CONFIG_SYS_GBL_DATA_SIZE)
+                                       - GENERATED_GBL_DATA_SIZE)
 
 #define CONFIG_STACKSIZE               SZ_32K  /* regular stack */
 #define CONFIG_STACKSIZE_IRQ           SZ_4K   /* Unsure if to big or to small*/