]> git.sur5r.net Git - u-boot/blobdiff - include/configs/cam_enc_4xx.h
microblaze: Enable TFTP put command
[u-boot] / include / configs / cam_enc_4xx.h
index bd94cf3c19c70efdbb828afcdcf8cdc6e2c8c562..0fee53f750c58c84279830431fde3c412660e7ad 100644 (file)
@@ -68,7 +68,6 @@
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_NET_MULTI
 #define CONFIG_CMD_MII
 #define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_RESET_PHY_R
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_SAVES
 
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
 #ifdef CONFIG_MMC
 #define CONFIG_DOS_PARTITION
 #define CONFIG_CMD_EXT2
 #define CONFIG_POST    CONFIG_SYS_POST_MEMORY
 #define _POST_WORD_ADDR        0x0
 
-#define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
 #define CONFIG_SYS_INIT_SP_ADDR                CONFIG_SPL_STACK
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0xa0000
 
-/*
- * U-Boot is a 3rd stage loader and if booting with spl, cpu setup is
- * done in board_init_f from c code.
- */
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
 /* for UBL header */
 #define CONFIG_SYS_UBL_BLOCK           (CONFIG_SYS_NAND_PAGE_SIZE)