ppc4xx: remove PMC405 board

[u-boot] / include / configs / chromebook_link.h

diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index 48ae81eabbc13b0ae14df0b656411001c99c7011..8930210908f648170dd6b97a14172f7280f48546 100644 (file)
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -25,10 +25,10 @@
 
 #define CONFIG_X86_RESET_VECTOR
 #define CONFIG_NR_DRAM_BANKS                   8
-#define CONFIG_X86_MRC_START                   0xfffa0000
+#define CONFIG_X86_MRC_ADDR                    0xfffa0000
 #define CONFIG_CACHE_MRC_SIZE_KB               512
 
-#define CONFIG_COREBOOT_SERIAL
+#define CONFIG_X86_SERIAL
 
 #define CONFIG_SCSI_DEV_LIST           {PCI_VENDOR_ID_INTEL, \
                        PCI_DEVICE_ID_INTEL_NM10_AHCI},       \
@@ -39,7 +39,7 @@
        {PCI_VENDOR_ID_INTEL,           \
                        PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
 
-#define CONFIG_X86_OPTION_ROM_FILENAME         pci8086,0166.bin
+#define CONFIG_X86_OPTION_ROM_FILE             pci8086,0166.bin
 #define CONFIG_X86_OPTION_ROM_ADDR             0xfff90000
 #define CONFIG_VIDEO_X86
 
@@ -62,6 +62,11 @@
 #define VIDEO_IO_OFFSET                                0
 #define CONFIG_X86EMU_RAW_IO
 
+#define CONFIG_CROS_EC
+#define CONFIG_CROS_EC_LPC
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_ARCH_EARLY_INIT_R
+
 #define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,serial\0" \
                                        "stdout=vga,serial\0" \
                                        "stderr=vga,serial\0"