]> git.sur5r.net Git - u-boot/blobdiff - include/configs/cm_t43.h
arm: mvebu: clearfog: update SPI flash DT description
[u-boot] / include / configs / cm_t43.h
index 1e63098d5f17f0f50e3a000683f09046ac022b84..a2224915e7d5bdabb1717dd6c9d5ed0a4c196a95 100644 (file)
@@ -9,7 +9,6 @@
 #ifndef __CONFIG_CM_T43_H
 #define __CONFIG_CM_T43_H
 
-#define CONFIG_AM43XX
 #define CONFIG_CM_T43
 #define CONFIG_ARCH_CPU_INIT
 #define CONFIG_MAX_RAM_BANK_SIZE       (2048 << 20)    /* 2GB */
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_CLK         48000000
 #define CONFIG_SYS_NS16550_COM1                0x44e09000
-#ifdef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
 #define CONFIG_SYS_NS16550_REG_SIZE    (-4)
 #endif
 
 /* NAND support */
-#define CONFIG_NAND
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_BOOTP_GATEWAY
-#define CONFIG_NET_MULTI
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ATHEROS
-#define CONFIG_PHYLIB
 #define CONFIG_SYS_RX_ETH_BUFFER       64
 
 /* USB support */
 #define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 #define CONFIG_OMAP_USB_PHY
 #define CONFIG_AM437X_USB2PHY2_HOST
 
 #define V_OSCK                         24000000  /* Clock output from T2 */
 #define V_SCLK                         (V_OSCK)
 
-#define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SECT_SIZE           (64 * 1024)
 #define CONFIG_ENV_OFFSET              (768 * 1024)
 #define CONFIG_ENV_SPI_MAX_HZ           48000000
 
-#define CONFIG_SPL_LDSCRIPT            "arch/arm/mach-omap2/u-boot-spl.lds"
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "loadaddr=0x80200000\0" \
        "fdtaddr=0x81200000\0" \