DaVinci DM6467: Enhance board Support

[u-boot] / include / configs / cmc_pu2.h

diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h
index be478b24e41dea28a1a3166f0b9ffb2b1cc19f0a..a1976350e4fdb8297455fc9cf6ab627775b4251f 100644 (file)
--- a/include/configs/cmc_pu2.h
+++ b/include/configs/cmc_pu2.h
@@ -25,6 +25,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_AT91_LEGACY
+
 /* ARM asynchronous clock */
 #define AT91C_MAIN_CLOCK       179712000       /* from 18.432 MHz crystal (18432000 / 4 * 39) */
 #define AT91C_MASTER_CLOCK     (AT91C_MAIN_CLOCK/3)    /* peripheral clock */
@@ -66,15 +68,12 @@
 #define CONFIG_SYS_SDRC_MR_VAL2        0x00000003 /* Load Mode Register */
 #define CONFIG_SYS_SDRC_MR_VAL3        0x00000000 /* Normal Mode */
 #define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
-#else
-#define CONFIG_SKIP_RELOCATE_UBOOT
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
 
 /*
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 
 #define CONFIG_BAUDRATE                9600
 
@@ -152,7 +151,13 @@
 #define CONFIG_SYS_MEMTEST_START       PHYS_SDRAM
 #define CONFIG_SYS_MEMTEST_END         CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
 
-#define CONFIG_DRIVER_ETHER
+#define CONFIG_NET_MULTI               1
+#ifdef CONFIG_NET_MULTI
+#define CONFIG_DRIVER_AT91EMAC         1
+#define CONFIG_SYS_RX_ETH_BUFFER       8
+#else
+#define CONFIG_DRIVER_ETHER            1
+#endif
 #define CONFIG_NET_RETRY_COUNT         20
 #define CONFIG_AT91C_USE_RMII