#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg
-#if defined(CONFIG_P3041DS)
+#if defined(CONFIG_TARGET_P3041DS)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p3041ds.cfg
-#elif defined(CONFIG_P4080DS)
+#elif defined(CONFIG_TARGET_P4080DS)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p4080ds.cfg
-#elif defined(CONFIG_P5020DS)
+#elif defined(CONFIG_TARGET_P5020DS)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5020ds.cfg
-#elif defined(CONFIG_P5040DS)
+#elif defined(CONFIG_TARGET_P5040DS)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5040ds.cfg
#endif
#endif
#endif
/* High Level Configuration Options */
-#define CONFIG_BOOKE
-#define CONFIG_E500 /* BOOKE e500 family */
-#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MP /* support multiple processors */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_FSL_LAW /* Use common FSL init code */
-
#define CONFIG_ENV_OVERWRITE
#ifdef CONFIG_SYS_NO_FLASH
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
#define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS1 0x51
#define CONFIG_BAUDRATE 115200
-#ifdef CONFIG_P4080DS
+#ifdef CONFIG_TARGET_P4080DS
#define __USB_PHY_TYPE ulpi
#else
#define __USB_PHY_TYPE utmi