DaVinci DM6467: Enhance board Support

[u-boot] / include / configs / corenet_ds.h

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index fa05baa2b22cfd29458d77968f8f9fb0424b7362..bff212e40d71e658cd837b3801b5e0756bfc7f6f 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -80,7 +80,7 @@
 #define CONFIG_BACKSIDE_L2_CACHE
 #define CONFIG_SYS_INIT_L2CSR0         L2CSR0_L2E
 #define CONFIG_BTB                     /* toggle branch predition */
-/*#define      CONFIG_DDR_ECC*/
+#define        CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
@@ -446,13 +446,11 @@
 #define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x1f
 #define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 4
 
-#if (CONFIG_SYS_NUM_FMAN == 2)
 #define CONFIG_SYS_FM2_DTSEC1_PHY_ADDR 0x1c
 #define CONFIG_SYS_FM2_DTSEC2_PHY_ADDR 0x1d
 #define CONFIG_SYS_FM2_DTSEC3_PHY_ADDR 0x1e
 #define CONFIG_SYS_FM2_DTSEC4_PHY_ADDR 0x1f
 #define CONFIG_SYS_FM2_10GEC1_PHY_ADDR 0
-#endif
 
 #define CONFIG_SYS_TBIPA_VALUE 8
 #define CONFIG_MII             /* MII PHY management */