FSL DDR: Convert STXSSA to new DDR code.

[u-boot] / include / configs / csb637.h

diff --git a/include/configs/csb637.h b/include/configs/csb637.h
index f93c3bcd6f31c60f209cbe2551aefc05077b1cef..88c8fdbf7fdf98cd1692a2d58e8c5480a3181e76 100644 (file)
--- a/include/configs/csb637.h
+++ b/include/configs/csb637.h
@@ -51,7 +51,7 @@
 #define MC_ASR_VAL     0x00000000
 #define MC_AASR_VAL    0x00000000
 #define EBI_CFGR_VAL   0x00000000
-#define SMC2_CSR_VAL   0x00003284 /* 16bit, 2 TDF, 4 WS */
+#define SMC_CSR0_VAL   0x00003284 /* 16bit, 2 TDF, 4 WS */
 
 /* clocks */
 #define PLLAR_VAL      0x2031BE01 /* 184.320000 MHz for PCK */
@@ -114,17 +114,11 @@
  */
 #include <config_cmd_default.h>
 
-#define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_DHCP
+#define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_PING
 
-#undef CONFIG_CMD_BDI
-#undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_AUTOSCRIPT
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_LOADS
-
+#ifdef NAND_SUPPORT_HAS_BEEN_FIXED     /* NAND support is broken / unimplemented */
 
 #define CFG_MAX_NAND_DEVICE    1       /* Max number of NAND devices           */
 #define SECTORSIZE 512
@@ -140,6 +134,7 @@
 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
 #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
 
+#include <asm/arch/AT91RM9200.h>       /* needed for port definitions */
 #define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
 #define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
 
@@ -155,6 +150,8 @@
 #define NAND_CTL_CLRCLE(nandptr)
 #define NAND_CTL_SETCLE(nandptr)
 
+#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */
+
 #define CONFIG_NR_DRAM_BANKS 1
 #define PHYS_SDRAM                     0x20000000
 #define PHYS_SDRAM_SIZE                        0x4000000  /* 64 megs */
@@ -182,7 +179,7 @@
 #define PHYS_FLASH_SIZE                        0x800000  /* 8 megs main flash */
 #define CFG_FLASH_BASE                 PHYS_FLASH_1
 #define CFG_FLASH_CFI          1       /* flash is CFI conformant      */
-#define CFG_FLASH_CFI_DRIVER   1       /* use common cfi driver        */
+#define CONFIG_FLASH_CFI_DRIVER        1       /* use common cfi driver        */
 #define CFG_FLASH_EMPTY_INFO
 #define CFG_FLASH_USE_BUFFER_WRITE 1   /* use buffered writes (20x faster) */
 #define CFG_MAX_FLASH_BANKS    1       /* max # of memory banks        */