]> git.sur5r.net Git - u-boot/blobdiff - include/configs/davinci_dm6467evm.h
CMD: Fix typo KGBD -> KGDB on debris board
[u-boot] / include / configs / davinci_dm6467evm.h
index 6b5d8656b688220ee414e361e51ea54799697af3..4f14e04165598256af6f820b033f3337fe8e241b 100644 (file)
 
 /* Spectrum Digital TMS320DM6467 EVM board */
 #define DAVINCI_DM6467EVM
+#define CONFIG_SYS_USE_NAND
+#define CONFIG_SYS_NAND_SMALLPAGE
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SKIP_RELOCATE_UBOOT
 
 /* SoC Configuration */
 #define CONFIG_ARM926EJS                               /* arm926ejs CPU */
+
+/* Clock rates detection */
+#ifndef __ASSEMBLY__
+extern unsigned int davinci_arm_clk_get(void);
+#endif
+
+/* Arm Clock frequency    */
+#define CONFIG_SYS_CLK_FREQ    davinci_arm_clk_get()
+/* Timer Input clock freq */
+#define CONFIG_SYS_HZ_CLOCK            (CONFIG_SYS_CLK_FREQ/2)
 #define CONFIG_SYS_TIMERBASE           0x01c21400      /* use timer 0 */
-#define CONFIG_SYS_HZ_CLOCK            27000000
 #define CONFIG_SYS_HZ                  1000
 #define CONFIG_SOC_DM646X
 
@@ -53,6 +63,7 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_SYS_BARGSIZE            1024            /* Bootarg Size */
 #define CONFIG_SYS_LOAD_ADDR           0x80700000      /* kernel address */
+#define CONFIG_REVISION_TAG
 
 /* Serial Driver info */
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_I2C_SPEED           80000
 #define CONFIG_SYS_I2C_SLAVE           10
 
+/* Network & Ethernet Configuration */
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_CMD_NET
+
 /* Flash & Environment */
 #define CONFIG_SYS_NO_FLASH
 #ifdef CONFIG_SYS_USE_NAND
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_SAVES
 #define CONFIG_CMD_EEPROM
-#undef CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
 #undef CONFIG_CMD_BDI
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_SETGETDCR
 #define CONFIG_CMD_NAND
 #endif
 
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
+#define CONFIG_MAX_RAM_BANK_SIZE       (256 << 20)     /* 256 MB */
+
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - \
+                                        GENERATED_GBL_DATA_SIZE)
+
 #endif /* __CONFIG_H */