ppc/85xx: Simplify the top makefile for 36-bit config for P2020DS

[u-boot] / include / configs / davinci_sonata.h

diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
index 70d2c7d0c5eda6cc748fac3c3f5b31bfd0c2152c..82901b39332d739a3e999dd95624b08cafa3df9f 100644 (file)
--- a/include/configs/davinci_sonata.h
+++ b/include/configs/davinci_sonata.h
@@ -52,14 +52,15 @@
 #define SONATA_BOARD
 #define CONFIG_SYS_NAND_SMALLPAGE
 #define CONFIG_SYS_USE_NOR
+#define CONFIG_DISPLAY_CPUINFO
 /*===================*/
 /* SoC Configuration */
 /*===================*/
 #define CONFIG_ARM926EJS                       /* arm926ejs CPU core */
-#define CONFIG_SYS_CLK_FREQ    297000000       /* Arm Clock frequency */
 #define CONFIG_SYS_TIMERBASE           0x01c21400      /* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK            27000000        /* Timer Input clock freq */
 #define CONFIG_SYS_HZ                  1000
+#define CONFIG_SOC_DM644X
 /*====================================================*/
 /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
 /* on Sonata/DV_EVM board. No EEPROM on schmoogie.    */
@@ -87,7 +88,7 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    -4      /* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1        0x01c20000      /* Base address of UART0 */
-#define CONFIG_SYS_NS16550_CLK         27000000        /* Input clock to NS16550 */
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK     /* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX      1               /* use UART0 for console */
 #define CONFIG_BAUDRATE                115200          /* Default baud rate */
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
@@ -108,6 +109,7 @@
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_NET_MULTI
 /*=====================*/
 /* Flash & Environment */
 /*=====================*/