]> git.sur5r.net Git - u-boot/blobdiff - include/configs/devkit8000.h
microblaze: Enable TFTP put command
[u-boot] / include / configs / devkit8000.h
index c090d2b3865a794a4fe2a6f114464b04ccbe6ad3..2b6a6ee091815a36162f7d601d0a71aaa28b8ff4 100644 (file)
 #define CONFIG_OMAP34XX                1       /* which is a 34XX */
 #define CONFIG_OMAP3_DEVKIT8000        1       /* working with DevKit8000 */
 
-#define        CONFIG_SYS_TEXT_BASE    0x80008000
+/*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE   0x80100000
 
 #define CONFIG_SDRC    /* The chip has SDRC controller */
 
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
 
-#define CONFIG_SYS_NAND_ECCSTEPS       (CONFIG_SYS_NAND_PAGE_SIZE / \
-                                               CONFIG_SYS_NAND_ECCSIZE)
-#define CONFIG_SYS_NAND_ECCTOTAL       (CONFIG_SYS_NAND_ECCBYTES * \
-                                               CONFIG_SYS_NAND_ECCSTEPS)
-
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0x200000
 
-#define CONFIG_SYS_SPL_MALLOC_START    0x80108000
+#define CONFIG_SYS_SPL_MALLOC_START    0x80208000
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000        /* 1 MB */
 
 #endif /* __CONFIG_H */