usb: dwc3: Add DWC3 controller driver support

[u-boot] / include / configs / exynos5-common.h

diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index b03966da38810b58587aba246290910d99b06a34..5476248d88d2b61799c06d62e162894a963fc796 100644 (file)
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -16,14 +16,14 @@
 #define CONFIG_SYS_CACHELINE_SIZE      64
 #define CONFIG_EXYNOS_SPL
 
-/* Allow tracing to be enabled */
+#ifdef FTRACE
 #define CONFIG_TRACE
 #define CONFIG_CMD_TRACE
 #define CONFIG_TRACE_BUFFER_SIZE       (16 << 20)
 #define CONFIG_TRACE_EARLY_SIZE                (8 << 20)
 #define CONFIG_TRACE_EARLY
 #define CONFIG_TRACE_EARLY_ADDR                0x50000000
-
+#endif
 
 /* Enable ACE acceleration for SHA1 and SHA256 */
 #define CONFIG_EXYNOS_ACE_SHA
@@ -47,14 +47,6 @@
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_CONSOLE_MUX
 
-#define EXYNOS_DEVICE_SETTINGS \
-               "stdin=serial\0" \
-               "stdout=serial\0" \
-               "stderr=serial\0"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-       EXYNOS_DEVICE_SETTINGS
-
 #define CONFIG_CMD_HASH
 
 /* Thermal Management Unit */
@@ -134,12 +126,13 @@
 #define SPI_FLASH_UBOOT_POS    (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
 
 /* I2C */
-#define CONFIG_SYS_I2C_INIT_BOARD
-#define CONFIG_SYS_I2C
+
+/* TODO(sjg@chromium.org): Move these two options to Kconfig */
+#define CONFIG_DM_I2C
+#define CONFIG_DM_I2C_COMPAT
 #define CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_S3C24X0_SPEED   100000          /* 100 Kbps */
 #define CONFIG_SYS_I2C_S3C24X0
-#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_I2C_S3C24X0_SPEED   100000          /* 100 Kbps */
 #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0x0
 #define CONFIG_I2C_EDID
 
@@ -156,6 +149,10 @@
 #define CONFIG_OF_SPI
 #endif
 
+/* Power */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+
 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_MODE    SPI_MODE_0
 #define CONFIG_ENV_SECT_SIZE   CONFIG_ENV_SIZE
@@ -182,6 +179,16 @@
 
 #define CONFIG_CMD_GPIO
 
+/* USB */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS     3
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS     2
+
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_SMSC95XX
+
 /* USB boot mode */
 #define CONFIG_USB_BOOTING
 #define EXYNOS_COPY_USB_FNPTR_ADDR     0x02020070
@@ -192,4 +199,41 @@
 #define CONFIG_FIT
 #define CONFIG_FIT_BEST_MATCH
 
+
+#define BOOT_TARGET_DEVICES(func) \
+       func(MMC, mmc, 1) \
+       func(MMC, mmc, 0) \
+       func(PXE, pxe, na) \
+       func(DHCP, dhcp, na)
+
+#include <config_distro_bootcmd.h>
+
+#ifndef MEM_LAYOUT_ENV_SETTINGS
+/* 2GB RAM, bootm size of 256M, load scripts after that */
+#define MEM_LAYOUT_ENV_SETTINGS \
+       "bootm_size=0x10000000\0" \
+       "kernel_addr_r=0x42000000\0" \
+       "fdt_addr_r=0x43000000\0" \
+       "ramdisk_addr_r=0x43300000\0" \
+       "scriptaddr=0x50000000\0" \
+       "pxefile_addr_r=0x51000000\0"
+#endif
+
+#ifndef EXYNOS_DEVICE_SETTINGS
+#define EXYNOS_DEVICE_SETTINGS \
+       "stdin=serial\0" \
+       "stdout=serial\0" \
+       "stderr=serial\0"
+#endif
+
+#ifndef EXYNOS_FDTFILE_SETTING
+#define EXYNOS_FDTFILE_SETTING
+#endif
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+       EXYNOS_DEVICE_SETTINGS \
+       EXYNOS_FDTFILE_SETTING \
+       MEM_LAYOUT_ENV_SETTINGS \
+       BOOTENV
+
 #endif /* __CONFIG_EXYNOS5_COMMON_H */